linker template, move build output
This commit is contained in:
wrapper
parent
256c308060
commit
2d4b0a5f69
8 changed files with 66 additions and 168 deletions
4
.gitignore
vendored
4
.gitignore
vendored
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@ -17,4 +17,6 @@ build_script/
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test_emu/
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*.pyc
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dcc_test.py
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old_stuff/
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old_stuff/
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linker/linker.ld
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.out/
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14
crt.s
14
crt.s
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@ -54,7 +54,7 @@ _vectors:
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.global DCC_PKT_RW_SIZE
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#endif
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#ifdef PIC
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#ifdef USE_PIC
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.extern pic_relocate
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#endif
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@ -85,7 +85,7 @@ CrashHandler:
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/* DCC info */
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.ascii "DNDL"
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#ifdef PIC
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#ifdef USE_PIC
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.word 1
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#else
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.word 0
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@ -127,20 +127,20 @@ ResetHandler:
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#endif
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/* 01 - Initialize stack section */
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#ifdef PIC
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#ifdef USE_PIC
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mov r0, #0
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adr r0, _vectors
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#endif
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ldr sp, =__stack_svc_end
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#ifdef PIC
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#ifdef USE_PIC
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add sp, r0
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#endif
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bl plat_init
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/* 02 - Reset memory */
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#ifdef PIC
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#ifdef USE_PIC
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mov r0, #0
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adr r0, _vectors
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#endif
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@ -152,7 +152,7 @@ ResetHandler:
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ldr r2, =__bss_end
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mov r3, #0
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#ifdef PIC
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#ifdef USE_PIC
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add r1, r0
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add r2, r0
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#endif
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@ -162,7 +162,7 @@ bss_clear_loop:
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bne bss_clear_loop
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/* 03 - Code initialize */
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#ifdef PIC
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#ifdef USE_PIC
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mov r0, #0
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adr r0, _vectors
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@ -29,7 +29,7 @@ PHDRS
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MEMORY
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{
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ram : org = 0x78000000, len = 128k
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ram : org = ${DCC_LOAD_OFFSET}, len = ${DCC_MEMORY_SIZE_KB}k
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}
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/*
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@ -134,6 +134,5 @@ SECTIONS
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PROVIDE (__stack_end = .);
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PROVIDE (__heap_start = .);
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} > ram
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}
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/*** EOF ***/
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138
linker/ram.ld
138
linker/ram.ld
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@ -1,138 +0,0 @@
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/* SPDX-License-Identifier: BSD-3-Clause */
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/****************************************************************************
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* Copyright (c) 2006 by Michael Fischer. All rights reserved.
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****************************************************************************
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*
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* History:
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*
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* 30.03.06 mifi First Version
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****************************************************************************/
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ENTRY(ResetHandler)
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SEARCH_DIR(.)
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/*
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* Define stack size here
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*/
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FIQ_STACK_SIZE = 0x0100;
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IRQ_STACK_SIZE = 0x0100;
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ABT_STACK_SIZE = 0x0100;
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UND_STACK_SIZE = 0x0100;
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SVC_STACK_SIZE = 0x0100;
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PHDRS
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{
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code PT_LOAD;
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data PT_LOAD;
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}
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MEMORY
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{
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ram : org = 0x00000000, len = 512k
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}
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/*
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* Do not change the next code
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*/
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SECTIONS
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{
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.text :
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{
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*(.vectors);
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. = ALIGN(4);
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*(.init);
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. = ALIGN(4);
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*(.text);
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. = ALIGN(4);
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*(.rodata);
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. = ALIGN(4);
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*(.rodata*);
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. = ALIGN(4);
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*(.glue_7t);
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. = ALIGN(4);
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*(.glue_7);
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. = ALIGN(4);
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etext = .;
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} > ram :code
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.data :
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{
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PROVIDE (__data_start = .);
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*(.data)
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. = ALIGN(4);
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edata = .;
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PROVIDE (__data_end = .);
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} > ram :data
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.plt : ALIGN(4)
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{
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*(.plt)
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. = ALIGN(4);
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} > ram :code
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.got : ALIGN(4)
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{
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_sgot = .;
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_sgot_main = .;
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*(.got)
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_egot_main = .;
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} > ram :data
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.got.plt : ALIGN(4)
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{
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_sgot_plt = .;
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*(.got.plt)
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_egot_plt = .;
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_egot = .;
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_edata = .;
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} > ram :data
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.rel.dyn : ALIGN(4)
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{
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_reloc_start = .;
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*(.rel.dyn)
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} > ram :data
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.bss :
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{
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_reloc_end = .;
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PROVIDE (__bss_start = .);
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*(.bss)
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*(COMMON)
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. = ALIGN(4);
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PROVIDE (__bss_end = .);
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. = ALIGN(256);
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PROVIDE (__stack_start = .);
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PROVIDE (__stack_fiq_start = .);
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. += FIQ_STACK_SIZE;
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. = ALIGN(4);
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PROVIDE (__stack_fiq_end = .);
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PROVIDE (__stack_irq_start = .);
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. += IRQ_STACK_SIZE;
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. = ALIGN(4);
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PROVIDE (__stack_irq_end = .);
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PROVIDE (__stack_abt_start = .);
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. += ABT_STACK_SIZE;
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. = ALIGN(4);
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PROVIDE (__stack_abt_end = .);
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PROVIDE (__stack_und_start = .);
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. += UND_STACK_SIZE;
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. = ALIGN(4);
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PROVIDE (__stack_und_end = .);
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PROVIDE (__stack_svc_start = .);
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. += SVC_STACK_SIZE;
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. = ALIGN(4);
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PROVIDE (__stack_svc_end = .);
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PROVIDE (__stack_end = .);
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PROVIDE (__heap_start = .);
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} > ram
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}
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/*** EOF ***/
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2
main.c
2
main.c
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@ -6,8 +6,8 @@
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const char CFLAGS[] = "C:DumpNow DCC Loader. (c) 2026 Wrapper.;Compile flags: " CDEFS ";Compile Date: " __DATE__;
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#endif
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#if !USE_BREAKPOINTS && !DISABLE_COMPRESS
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static uint8_t read_buffer[DCC_BUFFER_SIZE + 0x2000];
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#if !USE_BREAKPOINTS && !DISABLE_COMPRESS
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static uint8_t compress_buffer[DCC_BUFFER_SIZE + 0x4000];
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#endif
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57
makefile
57
makefile
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@ -2,6 +2,7 @@
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# Start of default section
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#
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# Tools
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TRGT = arm-none-eabi-
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CC = $(TRGT)gcc
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CP = $(TRGT)objcopy
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@ -9,8 +10,7 @@ AS = $(TRGT)gcc -x assembler-with-cpp
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HEX = $(CP) -O ihex
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BIN = $(CP) -O binary
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OBJDUMP = $(TRGT)objdump
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MCU = arm7tdmi
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PYTHON = python
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# List all default C defines here, like -D_DEBUG=1
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DDEFS =
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@ -38,8 +38,9 @@ DLIBS =
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# Define project name here
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PROJECT = dumpnow
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# Define linker script file here
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LDSCRIPT = linker/ram.ld
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# Auto LD script stuff
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LOADER_LOAD_START = 0x00000000
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LOADER_LOAD_SIZE_KB = 512
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# List all user C define here, like -D_DEBUG=1
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UDEFS =
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@ -47,14 +48,24 @@ UDEFS =
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# Define ASM defines here
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UADEFS =
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# List C source files here
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# CPU type
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MCU = arm7tdmi
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# Target platform
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PLATFORM = default
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# Storage devices for the target platform
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LOADER_DEVICES = default
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# Define optimisation level here
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OPT = -O2
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# Dependencies
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DEVICES = flash/mmap/mmap.c
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CONTROLLERS =
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ADD_DEPS =
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PLATFORM = default
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LOADER_DEVICES = default
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# Additional deps
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# Optional dependencies
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ifeq ($(LZO), 1)
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ADD_DEPS += minilzo/minilzo.c
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DDEFS += -DHAVE_MINILZO=1
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@ -65,7 +76,7 @@ ADD_DEPS += lz4/lz4_fs.c
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DDEFS += -DHAVE_LZ4=1
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endif
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# Devices
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# Storage devices
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ifeq ($(CFI), 1)
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DEVICES += flash/cfi/cfi.c
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endif
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@ -85,7 +96,7 @@ DEVICES += flash/superand/superand.c
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CONTROLLERS += flash/superand/controller/$(SUPERAND_CONTROLLER).c
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endif
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# Configuration
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# Loader configuration
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ifeq ($(MCU), xscale)
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DDEFS += -DCPU_XSCALE
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DADEFS += -DCPU_XSCALE
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@ -115,6 +126,7 @@ DADEFS += -DUSE_PIC
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ADD_DEPS += dcc/pic.c
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endif
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# List C source files here
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SRC = main.c dcc/memory.c dcc/dn_dcc_proto.c dcc/bitutils.c dcc/lwprintf.c plat/$(PLATFORM).c devices/$(LOADER_DEVICES).c $(DEVICES) $(CONTROLLERS) $(ADD_DEPS)
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# List ASM source files here
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@ -129,19 +141,15 @@ ULIBDIR =
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# List all user libraries here
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ULIBS =
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# Define optimisation level here
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OPT = -O2
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#
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# End of user defines
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##############################################################################################
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INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
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LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
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DEFS = $(DDEFS) $(UDEFS) -DCDEFS="\"FLAGS=$(DDEFS) $(UDEFS) CPU=$(MCU) PLATFORM=$(PLATFORM) LOADER_DEVICES=$(LOADER_DEVICES) DEVICES=$(DEVICES) CONTROLLERS=$(CONTROLLERS)\""
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ADEFS = $(DADEFS) $(UADEFS) -DADEFS="\"FLAGS=$(DADEFS) $(UADEFS) CPU=$(MCU)\""
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OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
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OBJS = $(ASRC:%.s=.out/%.o) $(SRC:%.c=.out/%.o)
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LIBS = $(DLIBS) $(ULIBS)
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MCFLAGS = -mcpu=$(MCU)
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CC_PIC =
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@ -173,12 +181,23 @@ ifeq ($(PLATFORM), default)
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$(warning Building without platform specific routines, specify PLATFORM to change that)
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endif
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ifndef LDSCRIPT
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LDSCRIPT = linker/linker.ld
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all: $(LDSCRIPT) $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).lst
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else
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all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).lst
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endif
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%.o : %.c
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%.ld : %.ld.tl
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$(info Generating linker script with offset: $(LOADER_LOAD_START); size: $(LOADER_LOAD_SIZE_KB)k)
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$(PYTHON) "utils/substitute.py" $< $@ $(LOADER_LOAD_START) $(LOADER_LOAD_SIZE_KB)
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.out/%.o : %.c
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@mkdir -p $(@D)
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$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
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%.o : %.s
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.out/%.o : %.s
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@mkdir -p $(@D)
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$(AS) -c $(ASFLAGS) $< -o $@
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%elf: $(OBJS)
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@ -221,12 +240,14 @@ endif
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$(info $(NULL) MCU=(MCU) = Select CPU architecture)
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$(info $(NULL) ICACHE=1 = Use instruction cache (ARM9 and later))
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$(info $(NULL) BP_LOADER=1 = If the chipset have broken DCC Support, compiling as Breakpoint-based loader might help)
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$(info $(NULL) BUFFER_SIZE=(Buffer Size) = DCC Buffer Size (Default: 0x40000))
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$(info $(NULL) BUFFER_SIZE=(Buffer Size) = DCC Buffer Size (Default: 0x4000))
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$(info $(NULL) PROJECT=(name) = Output name)
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$(info $(NULL) LDSCRIPT=(ld) = Linker script)
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$(info $(NULL) NO_COMPRESS=1 = Disable RLE compression, used if using with RIFF says failed to unpack received data.)
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$(info $(NULL) BIG_ENDIAN=1 = Big endian format)
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$(info $(NULL) PIC=1 = Use PIC code)
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$(info $(NULL) LOADER_LOAD_START=(LOAD_OFFSET_IN_HEX) = With LDSCRIPT unset, set loader start offset)
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$(info $(NULL) LOADER_LOAD_SIZE_KB=(LOAD_SIZE_IN_KB) = With LDSCRIPT unset, set RAM size for the loader)
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$(info Flash devices:)
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$(info $(NULL) CFI=1 = Enable CFI interface)
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$(info $(NULL) NAND_CONTROLLER=(name) = Enable NAND controller)
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@ -44,7 +44,7 @@ const uint32_t gpio_mask_index[4] = {0xffffffff, 0xffffffff, 0xffffffff, 0xfffff
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const uint32_t gpio_mask_index[3] = {0x1f801fe, 0xffffe1c0, 0x3fff};
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#endif
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inline void plat_gpio_get_base(uint32_t pin, uint32_t reg_offset, uint32_t *reg_conv_offset, uint32_t *reg_mask) {
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static inline void plat_gpio_get_base(uint32_t pin, uint32_t reg_offset, uint32_t *reg_conv_offset, uint32_t *reg_mask) {
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uint32_t pin_bit_offset = pin & 0x1f;
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uint32_t mask_index = pin >> 5;
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uint32_t base_offset = (gpio_mask_index[mask_index] & (1 << pin_bit_offset)) ? GPIO1_OFFSET : GPIO2_OFFSET; // 1 - GPIO1, 0 - GPIO2
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14
utils/substitute.py
Normal file
14
utils/substitute.py
Normal file
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@ -0,0 +1,14 @@
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from string import Template
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from argparse import ArgumentParser
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if __name__ == "__main__":
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ap = ArgumentParser()
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ap.add_argument("in_file")
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ap.add_argument("out_file")
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ap.add_argument("dcc_start")
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ap.add_argument("dcc_mem_size")
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args = ap.parse_args()
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temp = Template(open(args.in_file, "r").read())
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open(args.out_file, "w").write(temp.substitute(DCC_LOAD_OFFSET=args.dcc_start, DCC_MEMORY_SIZE_KB=args.dcc_mem_size))
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