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Merge "libhevcenc: Move deblk, sao and subpel plane generation into nctb loop" am: f74c2f62dd

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am: 7b50e40026

Change-Id: Ia91b2f9acdc28fa46b4bbb309f39bc7c65f1e6f7
This commit is contained in:
Akshata Jadhav 2019-12-01 14:50:02 -08:00 • committed by android-build-merger
commit 5a302f5f2b
4 changed files with 368 additions and 356 deletions
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478
encoder/ihevce_enc_loop_pass.c
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@ -1733,9 +1733,11 @@ void ihevce_enc_loop_process_row(
WORD32 last_ctb_col_flag;
WORD32 last_hz_ctb_wd;
WORD32 last_vt_ctb_ht;
void *pv_dep_mngr_enc_loop_dblk;
void *pv_dep_mngr_enc_loop_cu_top_right;
void *pv_dep_mngr_enc_loop_dblk = ps_ctxt->pv_dep_mngr_enc_loop_dblk;
void *pv_dep_mngr_enc_loop_sao = ps_ctxt->pv_dep_mngr_enc_loop_sao;
void *pv_dep_mngr_enc_loop_cu_top_right = ps_ctxt->pv_dep_mngr_enc_loop_cu_top_right;
WORD32 dblk_offset, dblk_check_dep_pos;
WORD32 sao_offset, sao_check_dep_pos;
WORD32 aux_offset, aux_check_dep_pos;
void *pv_dep_mngr_me_dep_encloop;
ctb_enc_loop_out_t *ps_ctb_out_sao;
@ -1751,10 +1753,6 @@ void ihevce_enc_loop_process_row(
ps_ctxt->s_sao_ctxt_t.u4_num_ctbs_horz = ps_frm_ctb_prms->i4_num_ctbs_horz;
ps_ctxt->s_sao_ctxt_t.u4_num_ctbs_vert = ps_frm_ctb_prms->i4_num_ctbs_vert;
/* Get the EncLoop Deblock Dep Mngr */
pv_dep_mngr_enc_loop_dblk = ps_ctxt->pv_dep_mngr_enc_loop_dblk;
/* Get the EncLoop Top-Right CU Dep Mngr */
pv_dep_mngr_enc_loop_cu_top_right = ps_ctxt->pv_dep_mngr_enc_loop_cu_top_right;
/* Set Variables for Dep. Checking and Setting */
aux_check_dep_pos = vert_ctr;
aux_offset = 2; /* Should be there for 0th row also */
@ -1770,6 +1768,19 @@ void ihevce_enc_loop_process_row(
dblk_offset = -(ps_tile_params->i4_first_sample_x + 1);
}
/* Set sao_offset and sao_check_dep_pos */
if(vert_ctr > 1)
{
sao_check_dep_pos = vert_ctr - 2;
sao_offset = 2;
}
else
{
/* First row should run without waiting */
sao_check_dep_pos = 0;
sao_offset = -(ps_tile_params->i4_first_sample_x + 1);
}
/* check if the current row processed in last CTb row */
last_ctb_row_flag = (vert_ctr == (ps_frm_ctb_prms->i4_num_ctbs_vert - 1));
@ -2489,30 +2500,52 @@ void ihevce_enc_loop_process_row(
(ctb_size >> 3); //one horizontal edge per 8x8 block
s_deblk_ctb_row_params.pi1_ctb_row_qp +=
(ctb_size >> 2); //one qp per 4x4 block.
} //end of if((0 == ps_ctxt->i4_deblock_type)
}
} // end of if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
/* Apply SAO over the previous CTB-row */
/* update the number of ctbs deblocked for this row */
ihevce_dmgr_set_row_row_sync(
pv_dep_mngr_enc_loop_dblk,
(ctb_ctr + 1),
vert_ctr,
ps_ctxt->i4_tile_col_idx /* Col Tile No. */);
} //end of loop over CTBs in current CTB-row
/* Apply SAO over the previous CTB-row */
for(ctb_ctr = ctb_start; ctb_ctr < ctb_end; ctb_ctr++)
{
if(ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_luma_flag ||
ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_chroma_flag)
{
sao_ctxt_t *ps_sao_ctxt = &ps_ctxt->s_sao_ctxt_t;
if((vert_ctr > ps_tile_params->i4_first_ctb_y) &&
(ctb_ctr > ctb_start)) //if((vert_ctr > 0) && (ctb_ctr > 0))
if(vert_ctr > ps_tile_params->i4_first_ctb_y)
{
/*For last ctb check top dep only*/
if((vert_ctr > 1) && ((ctb_ctr + 1) == ctb_end))
{
sao_offset = 1;
}
ihevce_dmgr_chk_row_row_sync(
pv_dep_mngr_enc_loop_sao,
ctb_ctr,
sao_offset,
sao_check_dep_pos,
ps_ctxt->i4_tile_col_idx, /* Col Tile No. */
ps_ctxt->thrd_id);
/* Call the sao function to do sao for the current ctb*/
/* Register the curr ctb's x pos in sao context*/
ps_sao_ctxt->i4_ctb_x = ctb_ctr - 1;
ps_sao_ctxt->i4_ctb_x = ctb_ctr;
/* Register the curr ctb's y pos in sao context*/
ps_sao_ctxt->i4_ctb_y = vert_ctr - 1;
ps_ctb_out_sao = ps_sao_ctxt->ps_ctb_out +
(vert_ctr - 1) * ps_frm_ctb_prms->i4_num_ctbs_horz +
(ctb_ctr - 1);
(vert_ctr - 1) * ps_frm_ctb_prms->i4_num_ctbs_horz + ctb_ctr;
ps_sao_ctxt->ps_sao = &ps_ctb_out_sao->s_sao;
ps_sao_ctxt->i4_sao_blk_wd = ctb_size;
ps_sao_ctxt->i4_sao_blk_ht = ctb_size;
@ -2520,6 +2553,14 @@ void ihevce_enc_loop_process_row(
ps_sao_ctxt->i4_is_last_ctb_row = 0;
ps_sao_ctxt->i4_is_last_ctb_col = 0;
if((ctb_ctr + 1) == ctb_end)
{
ps_sao_ctxt->i4_is_last_ctb_col = 1;
ps_sao_ctxt->i4_sao_blk_wd =
ctb_size - ((ps_tile_params->i4_curr_tile_wd_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_width);
}
/* Calculate the recon buf pointer and stride for teh current ctb */
ps_sao_ctxt->pu1_cur_luma_recon_buf =
ps_sao_ctxt->pu1_frm_luma_recon_buf +
@ -2596,47 +2637,78 @@ void ihevce_enc_loop_process_row(
[ps_ctxt->i4_bitrate_instance_num]
->u4_frame_rdopt_bits += u4_ctb_sao_bits;
}
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic &
0x1) /** Subpel generation not done for non-ref picture **/
/** Subpel generation not done for non-ref picture **/
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
{
/* Padding and Subpel Plane Generation */
ihevce_pad_interp_recon_ctb(
/* Recon Padding */
ihevce_recon_padding(
ps_pad_interp_recon,
ctb_ctr - 1,
ctb_ctr,
vert_ctr - 1,
ps_ctxt->i4_quality_preset,
ps_frm_ctb_prms,
ps_ctxt->ai2_scratch,
ps_ctxt->i4_bitrate_instance_num,
ps_ctxt->ps_func_selector);
}
/* update the number of SAO ctbs for this row */
ihevce_dmgr_set_row_row_sync(
pv_dep_mngr_enc_loop_sao,
ctb_ctr + 1,
vert_ctr - 1,
ps_ctxt->i4_tile_col_idx /* Col Tile No. */);
}
}
else //SAO Disabled
{
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
{
/* Recon Padding */
ihevce_recon_padding(
ps_pad_interp_recon,
ctb_ctr,
vert_ctr,
ps_frm_ctb_prms,
ps_ctxt->ps_func_selector);
}
}
} // end of SAO for loop
/* Call the sao function again for the last ctb of the previous row*/
if(((ctb_ctr + 1) == (ctb_end)) &&
(vert_ctr >
ps_tile_params
->i4_first_ctb_y)) //( ((ctb_ctr+1) == ps_frm_ctb_prms->i4_num_ctbs_horz) && (vert_ctr > 0) )
/* Call the sao function again for the last ctb row of frame */
if(ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_luma_flag ||
ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_chroma_flag)
{
sao_ctxt_t *ps_sao_ctxt = &ps_ctxt->s_sao_ctxt_t;
if(vert_ctr ==
(ps_tile_params->i4_first_ctb_y + ps_tile_params->i4_curr_tile_ht_in_ctb_unit - 1))
{
for(ctb_ctr = ctb_start; ctb_ctr < ctb_end; ctb_ctr++)
{
/* Register the curr ctb's x pos in sao context*/
ps_ctxt->s_sao_ctxt_t.i4_ctb_x = ctb_ctr;
/* Register the curr ctb's y pos in sao context*/
ps_ctxt->s_sao_ctxt_t.i4_ctb_y = vert_ctr - 1;
ps_ctxt->s_sao_ctxt_t.i4_ctb_y = vert_ctr;
ps_ctb_out_sao = ps_ctxt->s_sao_ctxt_t.ps_ctb_out +
(vert_ctr - 1) * ps_frm_ctb_prms->i4_num_ctbs_horz + (ctb_ctr);
vert_ctr * ps_frm_ctb_prms->i4_num_ctbs_horz + ctb_ctr;
ps_ctxt->s_sao_ctxt_t.ps_sao = &ps_ctb_out_sao->s_sao;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_wd =
ctb_size - ((ps_tile_params->i4_curr_tile_wd_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_width);
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_wd = ps_ctxt->s_sao_ctxt_t.i4_ctb_size;
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_col = 0;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_ht = ps_ctxt->s_sao_ctxt_t.i4_ctb_size;
if((ctb_ctr + 1) == ctb_end)
{
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_col = 1;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_wd =
ctb_size - ((ps_tile_params->i4_curr_tile_wd_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_width);
}
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_row = 0;
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_col = 1;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_ht =
ctb_size - ((ps_tile_params->i4_curr_tile_ht_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_height);
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_row = 1;
/* Calculate the recon buf pointer and stride for teh current ctb */
ps_sao_ctxt->pu1_cur_luma_recon_buf =
@ -2699,7 +2771,6 @@ void ihevce_enc_loop_process_row(
{
UWORD32 u4_ctb_sao_bits;
ihevce_sao_analyse(
&ps_ctxt->s_sao_ctxt_t,
ps_ctb_out_sao,
@ -2714,8 +2785,31 @@ void ihevce_enc_loop_process_row(
[ps_ctxt->i4_bitrate_instance_num]
->u4_frame_rdopt_bits += u4_ctb_sao_bits;
}
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic &
0x1) /** Subpel generation not done for non-ref picture **/
/** Subpel generation not done for non-ref picture **/
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
{
/* Recon Padding */
ihevce_recon_padding(
ps_pad_interp_recon,
ctb_ctr,
vert_ctr,
ps_frm_ctb_prms,
ps_ctxt->ps_func_selector);
}
}
} //end of loop over CTBs in current CTB-row
}
/* Subpel Plane Generation*/
for(ctb_ctr = ctb_start; ctb_ctr < ctb_end; ctb_ctr++)
{
if(ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_luma_flag ||
ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_chroma_flag)
{
if(0 != vert_ctr)
{
/** Subpel generation not done for non-ref picture **/
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
{
/* Padding and Subpel Plane Generation */
ihevce_pad_interp_recon_ctb(
@ -2730,9 +2824,9 @@ void ihevce_enc_loop_process_row(
}
}
}
else //SAO Disabled
{
if(1 == ps_ctxt->i4_deblk_pad_hpel_cur_pic)
else
{ // SAO Disabled
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
{
/* Padding and Subpel Plane Generation */
ihevce_pad_interp_recon_ctb(
@ -2746,14 +2840,8 @@ void ihevce_enc_loop_process_row(
ps_ctxt->ps_func_selector);
}
}
}
/* update the number of ctbs deblocked for this row */
ihevce_dmgr_set_row_row_sync(
pv_dep_mngr_enc_loop_dblk,
(ctb_ctr + 1),
vert_ctr,
ps_ctxt->i4_tile_col_idx /* Col Tile No. */);
} //end of loop over CTBs in current CTB-row
{
if(!ps_ctxt->i4_bitrate_instance_num)
{
@ -2795,235 +2883,18 @@ void ihevce_enc_loop_process_row(
}
}
/* Call the sao function again for the last ctb row of frame */
/*process last ctb row*/
if(ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_luma_flag ||
ps_ctxt->s_sao_ctxt_t.ps_slice_hdr->i1_slice_sao_chroma_flag)
{
sao_ctxt_t *ps_sao_ctxt = &ps_ctxt->s_sao_ctxt_t;
for(ctb_ctr = ctb_start; ctb_ctr < ctb_end; ctb_ctr++)
if(vert_ctr ==
(ps_tile_params->i4_first_ctb_y + ps_tile_params->i4_curr_tile_ht_in_ctb_unit - 1))
{
if((vert_ctr == (ps_tile_params->i4_first_ctb_y +
ps_tile_params->i4_curr_tile_ht_in_ctb_unit - 1)) &&
(ctb_ctr >
ctb_start)) //((vert_ctr == (ps_frm_ctb_prms->i4_num_ctbs_vert - 1)) && (ctb_ctr > 0))
for(ctb_ctr = ctb_start; ctb_ctr < ctb_end; ctb_ctr++)
{
/* Register the curr ctb's x pos in sao context*/
ps_ctxt->s_sao_ctxt_t.i4_ctb_x = ctb_ctr - 1;
/* Register the curr ctb's y pos in sao context*/
ps_ctxt->s_sao_ctxt_t.i4_ctb_y = vert_ctr;
ps_ctb_out_sao = ps_ctxt->s_sao_ctxt_t.ps_ctb_out +
(vert_ctr)*ps_frm_ctb_prms->i4_num_ctbs_horz + (ctb_ctr - 1);
ps_ctxt->s_sao_ctxt_t.ps_sao = &ps_ctb_out_sao->s_sao;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_wd = ps_ctxt->s_sao_ctxt_t.i4_ctb_size;
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_col = 0;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_ht =
ctb_size - ((ps_tile_params->i4_curr_tile_ht_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_height);
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_row = 1;
/* Calculate the recon buf pointer and stride for teh current ctb */
ps_sao_ctxt->pu1_cur_luma_recon_buf =
ps_sao_ctxt->pu1_frm_luma_recon_buf +
(ps_sao_ctxt->i4_frm_luma_recon_stride * ps_sao_ctxt->i4_ctb_y * ctb_size) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_luma_recon_stride = ps_sao_ctxt->i4_frm_luma_recon_stride;
ps_sao_ctxt->pu1_cur_chroma_recon_buf =
ps_sao_ctxt->pu1_frm_chroma_recon_buf +
(ps_sao_ctxt->i4_frm_chroma_recon_stride * ps_sao_ctxt->i4_ctb_y *
(ctb_size >> (ps_ctxt->u1_chroma_array_type == 1))) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_chroma_recon_stride =
ps_sao_ctxt->i4_frm_chroma_recon_stride;
ps_sao_ctxt->pu1_cur_luma_src_buf =
ps_sao_ctxt->pu1_frm_luma_src_buf +
(ps_sao_ctxt->i4_frm_luma_src_stride * ps_sao_ctxt->i4_ctb_y * ctb_size) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_luma_src_stride = ps_sao_ctxt->i4_frm_luma_src_stride;
ps_sao_ctxt->pu1_cur_chroma_src_buf =
ps_sao_ctxt->pu1_frm_chroma_src_buf +
(ps_sao_ctxt->i4_frm_chroma_src_stride * ps_sao_ctxt->i4_ctb_y *
(ctb_size >> (ps_ctxt->u1_chroma_array_type == 1))) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_chroma_src_stride = ps_sao_ctxt->i4_frm_chroma_src_stride;
/* Calculate the pointer to buff to store the (x,y)th sao
* for the top merge of (x,y+1)th ctb
*/
ps_sao_ctxt->ps_top_ctb_sao =
&ps_sao_ctxt->aps_frm_top_ctb_sao[ps_ctxt->i4_enc_frm_id]
[ps_sao_ctxt->i4_ctb_x +
(ps_sao_ctxt->i4_ctb_y) *
ps_frm_ctb_prms->i4_num_ctbs_horz +
(ps_ctxt->i4_bitrate_instance_num *
ps_sao_ctxt->i4_num_ctb_units)];
/* Calculate the pointer to buff to store the top pixels of curr ctb*/
ps_sao_ctxt->pu1_curr_sao_src_top_luma =
ps_sao_ctxt->apu1_sao_src_frm_top_luma[ps_ctxt->i4_enc_frm_id] +
(ps_sao_ctxt->i4_ctb_y - 1) * ps_sao_ctxt->i4_frm_top_luma_buf_stride +
ps_sao_ctxt->i4_ctb_x * ctb_size +
ps_ctxt->i4_bitrate_instance_num * (ps_sao_ctxt->i4_top_luma_buf_size +
ps_sao_ctxt->i4_top_chroma_buf_size);
/* Calculate the pointer to buff to store the top pixels of curr ctb*/
ps_sao_ctxt->pu1_curr_sao_src_top_chroma =
ps_sao_ctxt->apu1_sao_src_frm_top_chroma[ps_ctxt->i4_enc_frm_id] +
(ps_sao_ctxt->i4_ctb_y - 1) * ps_sao_ctxt->i4_frm_top_chroma_buf_stride +
ps_sao_ctxt->i4_ctb_x * ctb_size +
ps_ctxt->i4_bitrate_instance_num * (ps_sao_ctxt->i4_top_luma_buf_size +
ps_sao_ctxt->i4_top_chroma_buf_size);
{
UWORD32 u4_ctb_sao_bits;
ihevce_sao_analyse(
&ps_ctxt->s_sao_ctxt_t,
ps_ctb_out_sao,
&u4_ctb_sao_bits,
ps_tile_params);
ps_ctxt
->aaps_enc_loop_rc_params[ps_ctxt->i4_enc_frm_id]
[ps_ctxt->i4_bitrate_instance_num]
->u4_frame_rdopt_header_bits += u4_ctb_sao_bits;
ps_ctxt
->aaps_enc_loop_rc_params[ps_ctxt->i4_enc_frm_id]
[ps_ctxt->i4_bitrate_instance_num]
->u4_frame_rdopt_bits += u4_ctb_sao_bits;
}
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic &
0x1) /** Subpel generation not done for non-ref picture **/
{
/* Padding and Subpel Plane Generation */
ihevce_pad_interp_recon_ctb(
ps_pad_interp_recon,
ctb_ctr - 1,
vert_ctr,
ps_ctxt->i4_quality_preset,
ps_frm_ctb_prms,
ps_ctxt->ai2_scratch,
ps_ctxt->i4_bitrate_instance_num,
ps_ctxt->ps_func_selector);
}
}
/* Call the sao function again for the last ctb of the last ctb row of frame */
if((vert_ctr == (ps_tile_params->i4_first_ctb_y +
ps_tile_params->i4_curr_tile_ht_in_ctb_unit - 1)) &&
((ctb_ctr + 1) ==
(ctb_end))) //( ((ctb_ctr+1) == ps_frm_ctb_prms->i4_num_ctbs_horz))
{
/* Register the curr ctb's x pos in sao context*/
ps_ctxt->s_sao_ctxt_t.i4_ctb_x = ctb_ctr;
/* Register the curr ctb's y pos in sao context*/
ps_ctxt->s_sao_ctxt_t.i4_ctb_y = vert_ctr;
ps_ctb_out_sao = ps_ctxt->s_sao_ctxt_t.ps_ctb_out +
(vert_ctr)*ps_frm_ctb_prms->i4_num_ctbs_horz + (ctb_ctr);
ps_ctxt->s_sao_ctxt_t.ps_sao = &ps_ctb_out_sao->s_sao;
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_wd =
ctb_size - ((ps_tile_params->i4_curr_tile_wd_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_width);
ps_ctxt->s_sao_ctxt_t.i4_sao_blk_ht =
ctb_size - ((ps_tile_params->i4_curr_tile_ht_in_ctb_unit * ctb_size) -
ps_tile_params->i4_curr_tile_height);
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_row = 1;
ps_ctxt->s_sao_ctxt_t.i4_is_last_ctb_col = 1;
/* Calculate the recon buf pointer and stride for teh current ctb */
ps_sao_ctxt->pu1_cur_luma_recon_buf =
ps_sao_ctxt->pu1_frm_luma_recon_buf +
(ps_sao_ctxt->i4_frm_luma_recon_stride * ps_sao_ctxt->i4_ctb_y * ctb_size) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_luma_recon_stride = ps_sao_ctxt->i4_frm_luma_recon_stride;
ps_sao_ctxt->pu1_cur_chroma_recon_buf =
ps_sao_ctxt->pu1_frm_chroma_recon_buf +
(ps_sao_ctxt->i4_frm_chroma_recon_stride * ps_sao_ctxt->i4_ctb_y *
(ctb_size >> (ps_ctxt->u1_chroma_array_type == 1))) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_chroma_recon_stride =
ps_sao_ctxt->i4_frm_chroma_recon_stride;
ps_sao_ctxt->pu1_cur_luma_src_buf =
ps_sao_ctxt->pu1_frm_luma_src_buf +
(ps_sao_ctxt->i4_frm_luma_src_stride * ps_sao_ctxt->i4_ctb_y * ctb_size) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_luma_src_stride = ps_sao_ctxt->i4_frm_luma_src_stride;
ps_sao_ctxt->pu1_cur_chroma_src_buf =
ps_sao_ctxt->pu1_frm_chroma_src_buf +
(ps_sao_ctxt->i4_frm_chroma_src_stride * ps_sao_ctxt->i4_ctb_y *
(ctb_size >> (ps_ctxt->u1_chroma_array_type == 1))) +
(ps_sao_ctxt->i4_ctb_x * ctb_size);
ps_sao_ctxt->i4_cur_chroma_src_stride = ps_sao_ctxt->i4_frm_chroma_src_stride;
/* Calculate the pointer to buff to store the (x,y)th sao
* for the top merge of (x,y+1)th ctb
*/
ps_sao_ctxt->ps_top_ctb_sao =
&ps_sao_ctxt->aps_frm_top_ctb_sao[ps_ctxt->i4_enc_frm_id]
[ps_sao_ctxt->i4_ctb_x +
ps_sao_ctxt->i4_ctb_y *
ps_frm_ctb_prms->i4_num_ctbs_horz +
(ps_ctxt->i4_bitrate_instance_num *
ps_sao_ctxt->i4_num_ctb_units)];
/* Calculate the pointer to buff to store the top pixels of curr ctb*/
ps_sao_ctxt->pu1_curr_sao_src_top_luma =
ps_sao_ctxt->apu1_sao_src_frm_top_luma[ps_ctxt->i4_enc_frm_id] +
(ps_sao_ctxt->i4_ctb_y - 1) * ps_sao_ctxt->i4_frm_top_luma_buf_stride +
ps_sao_ctxt->i4_ctb_x * ctb_size +
ps_ctxt->i4_bitrate_instance_num * (ps_sao_ctxt->i4_top_luma_buf_size +
ps_sao_ctxt->i4_top_chroma_buf_size);
/* Calculate the pointer to buff to store the top pixels of curr ctb*/
ps_sao_ctxt->pu1_curr_sao_src_top_chroma =
ps_sao_ctxt->apu1_sao_src_frm_top_chroma[ps_ctxt->i4_enc_frm_id] +
(ps_sao_ctxt->i4_ctb_y - 1) * ps_sao_ctxt->i4_frm_top_chroma_buf_stride +
ps_sao_ctxt->i4_ctb_x * ctb_size +
ps_ctxt->i4_bitrate_instance_num * (ps_sao_ctxt->i4_top_luma_buf_size +
ps_sao_ctxt->i4_top_chroma_buf_size);
{
UWORD32 u4_ctb_sao_bits;
ihevce_sao_analyse(
&ps_ctxt->s_sao_ctxt_t,
ps_ctb_out_sao,
&u4_ctb_sao_bits,
ps_tile_params);
ps_ctxt
->aaps_enc_loop_rc_params[ps_ctxt->i4_enc_frm_id]
[ps_ctxt->i4_bitrate_instance_num]
->u4_frame_rdopt_header_bits += u4_ctb_sao_bits;
ps_ctxt
->aaps_enc_loop_rc_params[ps_ctxt->i4_enc_frm_id]
[ps_ctxt->i4_bitrate_instance_num]
->u4_frame_rdopt_bits += u4_ctb_sao_bits;
}
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic &
0x1) /** Subpel generation not done for non-ref picture **/
if(ps_ctxt->i4_deblk_pad_hpel_cur_pic)
{
/* Padding and Subpel Plane Generation */
ihevce_pad_interp_recon_ctb(
@ -3037,8 +2908,7 @@ void ihevce_enc_loop_process_row(
ps_ctxt->ps_func_selector);
}
}
} //end of loop over CTBs in current CTB-row
}
/* If SAO is on, then signal completion of the last CTB row of frame */
{
if(vert_ctr == (ps_frm_ctb_prms->i4_num_ctbs_vert - 1))
@ -3399,6 +3269,10 @@ void ihevce_enc_loop_process(
ps_ctxt->pv_dep_mngr_enc_loop_dblk =
ps_master_ctxt
->aapv_dep_mngr_enc_loop_dblk[ps_ctxt->i4_enc_frm_id][i4_bitrate_instance_num];
/* Get the EncLoop Sao Dep Mngr */
ps_ctxt->pv_dep_mngr_enc_loop_sao =
ps_master_ctxt
->aapv_dep_mngr_enc_loop_sao[ps_ctxt->i4_enc_frm_id][i4_bitrate_instance_num];
ps_ctxt->pu1_curr_row_cabac_state = &ps_master_ctxt->au1_ctxt_models[vert_ctr][0];
@ -3557,13 +3431,15 @@ WORD32
WORD32 enc_loop_mem_recs = NUM_ENC_LOOP_MEM_RECS;
WORD32 enc_loop_dblk_dep_mngr_mem_recs =
i4_num_enc_loop_frm_pllel * i4_num_bitrate_inst * ihevce_dmgr_get_num_mem_recs();
WORD32 enc_loop_sao_dep_mngr_mem_recs =
i4_num_enc_loop_frm_pllel * i4_num_bitrate_inst * ihevce_dmgr_get_num_mem_recs();
WORD32 enc_loop_cu_top_right_dep_mngr_mem_recs =
i4_num_enc_loop_frm_pllel * i4_num_bitrate_inst * ihevce_dmgr_get_num_mem_recs();
WORD32 enc_loop_aux_br_dep_mngr_mem_recs =
i4_num_enc_loop_frm_pllel * (i4_num_bitrate_inst - 1) * ihevce_dmgr_get_num_mem_recs();
return (
(enc_loop_mem_recs + enc_loop_dblk_dep_mngr_mem_recs +
(enc_loop_mem_recs + enc_loop_dblk_dep_mngr_mem_recs + enc_loop_sao_dep_mngr_mem_recs +
enc_loop_cu_top_right_dep_mngr_mem_recs + enc_loop_aux_br_dep_mngr_mem_recs));
}
/*!
@ -4276,7 +4152,7 @@ WORD32 ihevce_enc_loop_get_mem_recs(
n_tabs = NUM_ENC_LOOP_MEM_RECS;
/*************************************************************************/
/* --- EncLoop Deblock sync Dep Mngr Mem requests -- */
/* --- EncLoop Deblock and SAO sync Dep Mngr Mem requests -- */
/*************************************************************************/
/* Fill the memtabs for EncLoop Deblock Dep Mngr */
@ -4300,6 +4176,21 @@ WORD32 ihevce_enc_loop_get_mem_recs(
i4_mem_space);
}
}
/* Fill the memtabs for EncLoop SAO Dep Mngr */
for(count = 0; count < i4_num_enc_loop_frm_pllel; count++)
{
for(ctr = 0; ctr < i4_num_bitrate_inst; ctr++)
{
n_tabs += ihevce_dmgr_get_mem_recs(
&ps_mem_tab[n_tabs],
DEP_MNGR_ROW_ROW_SYNC,
num_vert_units,
ps_init_prms->s_app_tile_params.i4_num_tile_cols,
i4_num_proc_thrds,
i4_mem_space);
}
}
}
/*************************************************************************/
@ -5650,7 +5541,7 @@ void *ihevce_enc_loop_init(
ps_master_ctxt->i4_num_bitrates = i4_num_bitrate_inst;
ps_master_ctxt->i4_num_enc_loop_frm_pllel = i4_num_enc_loop_frm_pllel;
/*************************************************************************/
/* --- EncLoop Deblock sync Dep Mngr Mem init -- */
/* --- EncLoop Deblock and SAO sync Dep Mngr Mem init -- */
/*************************************************************************/
{
WORD32 count;
@ -5681,6 +5572,25 @@ void *ihevce_enc_loop_init(
n_tabs += ihevce_dmgr_get_num_mem_recs();
}
}
for(count = 0; count < i4_num_enc_loop_frm_pllel; count++)
{
for(i = 0; i < i4_num_bitrate_inst; i++)
{
ps_master_ctxt->aapv_dep_mngr_enc_loop_sao[count][i] = ihevce_dmgr_init(
&ps_mem_tab[n_tabs],
pv_osal_handle,
DEP_MNGR_ROW_ROW_SYNC,
num_vert_units,
num_blks_in_row,
i4_num_tile_cols, /* Number of Col Tiles */
i4_num_proc_thrds,
0 /*Sem Disabled*/
);
n_tabs += ihevce_dmgr_get_num_mem_recs();
}
}
}
/*************************************************************************/
/* --- EncLoop Top-Right CU synnc Dep Mngr Mem init -- */
@ -5772,7 +5682,7 @@ void ihevce_enc_loop_reg_sem_hdls(
ps_master_ctxt = (ihevce_enc_loop_master_ctxt_t *)pv_enc_loop_ctxt;
/*************************************************************************/
/* --- EncLoop Deblock sync Dep Mngr reg Semaphores -- */
/* --- EncLoop Deblock and SAO sync Dep Mngr reg Semaphores -- */
/*************************************************************************/
for(enc_frm_id = 0; enc_frm_id < ps_master_ctxt->i4_num_enc_loop_frm_pllel; enc_frm_id++)
{
@ -5785,6 +5695,17 @@ void ihevce_enc_loop_reg_sem_hdls(
}
}
for(enc_frm_id = 0; enc_frm_id < ps_master_ctxt->i4_num_enc_loop_frm_pllel; enc_frm_id++)
{
for(i = 0; i < ps_master_ctxt->i4_num_bitrates; i++)
{
ihevce_dmgr_reg_sem_hdls(
ps_master_ctxt->aapv_dep_mngr_enc_loop_sao[enc_frm_id][i],
ppv_sem_hdls,
i4_num_proc_thrds);
}
}
/*************************************************************************/
/* --- EncLoop Top-Right CU synnc Dep Mngr reg Semaphores -- */
/*************************************************************************/
@ -5834,6 +5755,8 @@ void ihevce_enc_loop_delete(void *pv_enc_loop_ctxt)
{
/* --- EncLoop Deblock sync Dep Mngr Delete --*/
ihevce_dmgr_del(ps_enc_loop_ctxt->aapv_dep_mngr_enc_loop_dblk[enc_frm_id][ctr]);
/* --- EncLoop Sao sync Dep Mngr Delete --*/
ihevce_dmgr_del(ps_enc_loop_ctxt->aapv_dep_mngr_enc_loop_sao[enc_frm_id][ctr]);
/* --- EncLoop Top-Right CU sync Dep Mngr Delete --*/
ihevce_dmgr_del(ps_enc_loop_ctxt->aapv_dep_mngr_enc_loop_cu_top_right[enc_frm_id][ctr]);
}
@ -5879,6 +5802,9 @@ void ihevce_enc_loop_dep_mngr_frame_reset(void *pv_enc_loop_ctxt, WORD32 enc_frm
/* Dep. Mngr : Reset the num ctb Deblocked in every row for ENC sync */
ihevce_dmgr_rst_row_row_sync(ps_master_ctxt->aapv_dep_mngr_enc_loop_dblk[frame_id][ctr]);
/* Dep. Mngr : Reset the num SAO ctb in every row for ENC sync */
ihevce_dmgr_rst_row_row_sync(ps_master_ctxt->aapv_dep_mngr_enc_loop_sao[frame_id][ctr]);
/* Dep. Mngr : Reset the TopRight CU Processed in every row for ENC sync */
ihevce_dmgr_rst_row_row_sync(
ps_master_ctxt->aapv_dep_mngr_enc_loop_cu_top_right[frame_id][ctr]);

8
encoder/ihevce_enc_loop_structs.h
View file

@ -2296,6 +2296,9 @@ typedef struct
/** Pointer to Dep Mngr for controlling Deblocking Top dependency */
void *pv_dep_mngr_enc_loop_dblk;
/** Pointer to Dep Mngr for controlling Deblocking Top dependency */
void *pv_dep_mngr_enc_loop_sao;
/** pointer to store the cabac states at end of second CTB in current row */
UWORD8 *pu1_curr_row_cabac_state;
@ -2794,6 +2797,11 @@ typedef struct
*/
void *aapv_dep_mngr_enc_loop_dblk[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES];
/** Dependency manager for controlling Sao Top dependency
* One per each bit-rate and one per each frame in parallel
*/
void *aapv_dep_mngr_enc_loop_sao[MAX_NUM_ENC_LOOP_PARALLEL][IHEVCE_MAX_NUM_BITRATES];
/** number of bit-rate instances running */
WORD32 i4_num_bitrates;

231
encoder/ihevce_enc_subpel_gen.c
View file

@ -215,11 +215,10 @@ void ihevce_pad_interp_recon_ctb(
WORD32 i4_bitrate_instance_id,
func_selector_t *ps_func_selector)
{
UWORD8 *pu1_src, *pu1_src_uv, *pu1_buf_y, *pu1_buf_uv;
UWORD8 *pu1_src, *pu1_src_uv;
WORD32 stride, stride_uv, wd, ht, wd_uv, ht_uv, pad_x, pad_y, pad_subpel_x, pad_subpel_y;
WORD32 tot_wd, tot_ht, offset, cpy_ht_y, cpy_ht_uv;
WORD32 i4_chroma_vert_pad_default;
WORD32 top_extra_pix = 0, left_extra_pix = 0;
WORD32 ctb_size = ps_frm_ctb_prms->i4_ctb_size;
UWORD8 *pu1_dst_hxfy = ps_pad_interp_recon->pu1_sbpel_hxfy +
@ -233,13 +232,6 @@ void ihevce_pad_interp_recon_ctb(
(ctb_ctr * ctb_size);
UWORD8 u1_is_422 = (ps_pad_interp_recon->u1_chroma_array_type == 2);
ihevc_pad_top_ft *pf_pad_top = ps_func_selector->ihevc_pad_top_fptr;
ihevc_pad_bottom_ft *pf_pad_bottom = ps_func_selector->ihevc_pad_bottom_fptr;
ihevc_pad_left_luma_ft *pf_pad_left_luma = ps_func_selector->ihevc_pad_left_luma_fptr;
ihevc_pad_left_chroma_ft *pf_pad_left_chroma = ps_func_selector->ihevc_pad_left_chroma_fptr;
ihevc_pad_right_luma_ft *pf_pad_right_luma = ps_func_selector->ihevc_pad_right_luma_fptr;
ihevc_pad_right_chroma_ft *pf_pad_right_chroma = ps_func_selector->ihevc_pad_right_chroma_fptr;
ihevc_inter_pred_ft *pf_inter_pred_luma_horz =
ps_func_selector->ihevc_inter_pred_luma_horz_fptr;
ihevc_inter_pred_ft *pf_inter_pred_luma_vert =
@ -292,96 +284,26 @@ void ihevce_pad_interp_recon_ctb(
}
tot_ht = ht;
tot_wd = wd;
pu1_buf_y = pu1_src;
pu1_buf_uv = pu1_src_uv;
cpy_ht_y = ht;
cpy_ht_uv = ht_uv;
if(vert_ctr > 0)
{
top_extra_pix = 8;
}
if(ctb_ctr > 0)
{
left_extra_pix = 8;
}
/*top padding*/
if(vert_ctr == 0)
{
PAD_BUF_VER(
pu1_src - left_extra_pix, stride, wd + left_extra_pix, PAD_HORZ, PAD_VERT, pf_pad_top);
PAD_BUF_VER(
pu1_src_uv - left_extra_pix,
stride_uv,
wd_uv + left_extra_pix,
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_top);
tot_ht = pad_y + ht - 8;
/*if curr ctb is 1st ctb in ctb row, update dst pointer for Left padding*/
pu1_buf_y = pu1_src - PAD_VERT * stride;
pu1_buf_uv = pu1_src_uv - i4_chroma_vert_pad_default * stride_uv;
cpy_ht_y += PAD_VERT;
cpy_ht_uv += i4_chroma_vert_pad_default;
}
/*bottom padding*/
if(vert_ctr == (ps_frm_ctb_prms->i4_num_ctbs_vert - 1))
{
PAD_BUF_VER(
(pu1_src - left_extra_pix + (ht * stride)),
stride,
wd + left_extra_pix,
PAD_HORZ,
PAD_VERT,
pf_pad_bottom);
PAD_BUF_VER(
(pu1_src_uv - left_extra_pix + (ht_uv * stride_uv)),
stride_uv,
wd_uv + left_extra_pix,
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_bottom);
tot_ht = pad_y + ht + 8;
/*if curr ctb is 1st ctb in ctb row, update dst pointer for right padding*/
cpy_ht_y += PAD_VERT;
cpy_ht_uv += i4_chroma_vert_pad_default;
}
/*Left padding*/
if(ctb_ctr == 0)
{
PAD_BUF_HOR(
(pu1_buf_y - top_extra_pix * stride),
stride,
cpy_ht_y + top_extra_pix,
PAD_HORZ,
PAD_VERT,
pf_pad_left_luma);
PAD_BUF_HOR(
pu1_buf_uv - (top_extra_pix >> 1) * (u1_is_422 + 1) * stride_uv,
stride_uv,
cpy_ht_uv + (top_extra_pix >> 1) * (u1_is_422 + 1),
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_left_chroma);
tot_wd = pad_x + wd - 8;
}
/*right padding*/
if(ctb_ctr == (ps_frm_ctb_prms->i4_num_ctbs_horz - 1))
{
PAD_BUF_HOR(
(pu1_buf_y - (top_extra_pix * stride) + wd),
stride,
cpy_ht_y + top_extra_pix,
PAD_HORZ,
PAD_VERT,
pf_pad_right_luma);
PAD_BUF_HOR(
(pu1_buf_uv - ((top_extra_pix >> 1) * (u1_is_422 + 1) * stride_uv) + wd_uv),
stride_uv,
cpy_ht_uv + (top_extra_pix >> 1) * (u1_is_422 + 1),
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_right_chroma);
tot_wd = pad_x + wd + 8;
}
@ -475,6 +397,155 @@ void ihevce_pad_interp_recon_ctb(
}
}
void ihevce_recon_padding(
pad_interp_recon_frm_t *ps_pad_interp_recon,
WORD32 ctb_ctr,
WORD32 vert_ctr,
frm_ctb_ctxt_t *ps_frm_ctb_prms,
func_selector_t *ps_func_selector)
{
UWORD8 *pu1_src, *pu1_src_uv, *pu1_buf_y, *pu1_buf_uv;
WORD32 stride, stride_uv, wd, ht, wd_uv, ht_uv;
WORD32 cpy_ht_y, cpy_ht_uv;
WORD32 i4_chroma_vert_pad_default;
WORD32 top_extra_pix = 0, left_extra_pix = 0;
WORD32 ctb_size = ps_frm_ctb_prms->i4_ctb_size;
UWORD8 u1_is_422 = (ps_pad_interp_recon->u1_chroma_array_type == 2);
ihevc_pad_top_ft *pf_pad_top = ps_func_selector->ihevc_pad_top_fptr;
ihevc_pad_bottom_ft *pf_pad_bottom = ps_func_selector->ihevc_pad_bottom_fptr;
ihevc_pad_left_luma_ft *pf_pad_left_luma = ps_func_selector->ihevc_pad_left_luma_fptr;
ihevc_pad_left_chroma_ft *pf_pad_left_chroma = ps_func_selector->ihevc_pad_left_chroma_fptr;
ihevc_pad_right_luma_ft *pf_pad_right_luma = ps_func_selector->ihevc_pad_right_luma_fptr;
ihevc_pad_right_chroma_ft *pf_pad_right_chroma = ps_func_selector->ihevc_pad_right_chroma_fptr;
stride = ps_pad_interp_recon->i4_luma_recon_stride;
wd = ps_pad_interp_recon->i4_ctb_size;
ht = ps_pad_interp_recon->i4_ctb_size;
pu1_src = (UWORD8 *)ps_pad_interp_recon->pu1_luma_recon + (vert_ctr * ctb_size * stride) +
(ctb_ctr * ctb_size);
stride_uv = ps_pad_interp_recon->i4_chrm_recon_stride;
wd_uv = ps_pad_interp_recon->i4_ctb_size;
ht_uv = ps_pad_interp_recon->i4_ctb_size >> (0 == u1_is_422);
pu1_src_uv = (UWORD8 *)ps_pad_interp_recon->pu1_chrm_recon +
(vert_ctr * (ctb_size >> (0 == u1_is_422)) * stride_uv) + (ctb_ctr * ctb_size);
i4_chroma_vert_pad_default = PAD_VERT >> (0 == u1_is_422);
if(ctb_ctr == (ps_frm_ctb_prms->i4_num_ctbs_horz - 1))
{
WORD32 last_ctb_x =
ps_frm_ctb_prms->i4_cu_aligned_pic_wd -
((ps_frm_ctb_prms->i4_num_ctbs_horz - 1) * ps_pad_interp_recon->i4_ctb_size);
wd = last_ctb_x;
wd_uv = last_ctb_x;
}
if(vert_ctr == (ps_frm_ctb_prms->i4_num_ctbs_vert - 1))
{
WORD32 last_ctb_y =
ps_frm_ctb_prms->i4_cu_aligned_pic_ht -
((ps_frm_ctb_prms->i4_num_ctbs_vert - 1) * ps_pad_interp_recon->i4_ctb_size);
ht = last_ctb_y;
ht_uv = last_ctb_y >> (0 == u1_is_422);
}
pu1_buf_y = pu1_src;
pu1_buf_uv = pu1_src_uv;
cpy_ht_y = ht;
cpy_ht_uv = ht_uv;
if(vert_ctr > 0)
{
top_extra_pix = 8;
}
if(ctb_ctr > 0)
{
left_extra_pix = 8;
}
/*top padding*/
if(vert_ctr == 0)
{
PAD_BUF_VER(
pu1_src - left_extra_pix, stride, wd + left_extra_pix, PAD_HORZ, PAD_VERT, pf_pad_top);
PAD_BUF_VER(
pu1_src_uv - left_extra_pix,
stride_uv,
wd_uv + left_extra_pix,
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_top);
/*if curr ctb is 1st ctb in ctb row, update dst pointer for Left padding*/
pu1_buf_y = pu1_src - PAD_VERT * stride;
pu1_buf_uv = pu1_src_uv - i4_chroma_vert_pad_default * stride_uv;
cpy_ht_y += PAD_VERT;
cpy_ht_uv += i4_chroma_vert_pad_default;
}
/*bottom padding*/
if(vert_ctr == (ps_frm_ctb_prms->i4_num_ctbs_vert - 1))
{
PAD_BUF_VER(
((pu1_src - left_extra_pix) + (ht * stride)),
stride,
wd + left_extra_pix,
PAD_HORZ,
PAD_VERT,
pf_pad_bottom);
PAD_BUF_VER(
((pu1_src_uv - left_extra_pix) + (ht_uv * stride_uv)),
stride_uv,
wd_uv + left_extra_pix,
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_bottom);
/*if curr ctb is 1st ctb in ctb row, update dst pointer for right padding*/
cpy_ht_y += PAD_VERT;
cpy_ht_uv += i4_chroma_vert_pad_default;
}
/*Left padding*/
if(ctb_ctr == 0)
{
PAD_BUF_HOR(
(pu1_buf_y - top_extra_pix * stride),
stride,
cpy_ht_y + top_extra_pix,
PAD_HORZ,
PAD_VERT,
pf_pad_left_luma);
PAD_BUF_HOR(
pu1_buf_uv - (top_extra_pix >> 1) * (u1_is_422 + 1) * stride_uv,
stride_uv,
cpy_ht_uv + (top_extra_pix >> 1) * (u1_is_422 + 1),
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_left_chroma);
}
/*right padding*/
if(ctb_ctr == (ps_frm_ctb_prms->i4_num_ctbs_horz - 1))
{
PAD_BUF_HOR(
((pu1_buf_y - (top_extra_pix * stride)) + wd),
stride,
cpy_ht_y + top_extra_pix,
PAD_HORZ,
PAD_VERT,
pf_pad_right_luma);
PAD_BUF_HOR(
((pu1_buf_uv - ((top_extra_pix >> 1) * (u1_is_422 + 1) * stride_uv)) + wd_uv),
stride_uv,
cpy_ht_uv + (top_extra_pix >> 1) * (u1_is_422 + 1),
PAD_HORZ,
i4_chroma_vert_pad_default,
pf_pad_right_chroma);
}
}
void ihevce_pad_interp_recon_src_ctb(
pad_interp_recon_frm_t *ps_pad_interp_recon,
WORD32 ctb_ctr,

7
encoder/ihevce_enc_subpel_gen.h
View file

@ -86,6 +86,13 @@ void ihevce_pad_interp_recon_ctb(
WORD32 i4_bitrate_instance,
func_selector_t *ps_func_selector);
void ihevce_recon_padding(
pad_interp_recon_frm_t *ps_pad_interp_recon,
WORD32 ctb_ctr,
WORD32 vert_ctr,
frm_ctb_ctxt_t *ps_frm_ctb_prms,
func_selector_t *ps_func_selector);
void ihevce_pad_interp_recon_src_ctb(
pad_interp_recon_frm_t *ps_pad_interp_recon,
WORD32 ctb_ctr,