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Added memory barrier calls

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On some A72 based devices, data shared between cores was found to be
inconsistent which was resulting in an infinite loop.

Adding memory barriers before marking a CTB as parsed/processed,
all the pending memory operations are guaranteed to be completed.

Change-Id: I6e3bb11123a3c12ba7e69c4bfcd38960616f9fb5
(cherry picked from commit 031b91dde5)
This commit is contained in:
Harish Mahendrakar 2016-01-20 13:24:52 +05:30 • committed by Rachad
parent c07d2b24ad
commit 27405a217f
5 changed files with 8 additions and 0 deletions
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1
common/arm/ihevc_platform_macros.h
View file

@ -143,6 +143,7 @@ static INLINE UWORD32 CTZ(UWORD32 u4_word)
}
}
#define DATA_SYNC() __sync_synchronize()
/**
******************************************************************************

2
common/mips/ihevc_platform_macros.h
View file

@ -93,4 +93,6 @@ static inline UWORD32 CTZ(UWORD32 u4_word)
#define MEM_ALIGN16 __attribute__ ((aligned (16)))
#define MEM_ALIGN32 __attribute__ ((aligned (32)))
#define DATA_SYNC() __sync_synchronize()
#endif /* _IHEVC_PLATFORM_MACROS_H_ */

2
common/x86/ihevc_platform_macros.h
View file

@ -96,6 +96,8 @@ static INLINE UWORD32 CTZ(UWORD32 u4_word)
}
}
#define DATA_SYNC() __sync_synchronize()
/**
******************************************************************************
* @brief returns postion of msb bit for 32bit input

1
decoder/ihevcd_parse_slice.c
View file

@ -3115,6 +3115,7 @@ IHEVCD_ERROR_T ihevcd_parse_slice_data(codec_t *ps_codec)
}
DATA_SYNC();
/* Update the parse status map */
{

2
decoder/ihevcd_process_slice.c
View file

@ -189,6 +189,7 @@ void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD3
//NOP(128 * 16);
}
}
DATA_SYNC();
}
}
@ -202,6 +203,7 @@ void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD
/* Update the current CTBs processing status */
if(ps_proc->i4_check_proc_status)
{
DATA_SYNC();
for(i = 0; i < nctb; i++)
{
sps_t *ps_sps = ps_proc->ps_sps;