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armv8: Use neg instead of sub #0, neg as replacement for rsb

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When the arm code has been ported to aarch64, occurrances of
the rsb instruction have been replaced according to the
following pattern:

arm:
    rsb rB, rA, #X

aarch64:
    sub xTMP, xA, #X
    neg xB, xTMP

When the immediate constant #X is zero, we can just as well
use a plain neg instruction without any extra subtraction.

Change-Id: I637be20b469d8d4e7fac712e8039c7e3eedb8c54
This commit is contained in:
Martin Storsjo 2016-10-05 11:18:16 +03:00
parent 37edf81bad
commit e5b0a782fa
4 changed files with 6 additions and 12 deletions
Download patch file Download diff file Expand all files Collapse all files

3
common/armv8/ih264_intra_pred_luma_16x16_av8.s
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@ -444,8 +444,7 @@ ih264_intra_pred_luma_16x16_mode_plane_av8:
uxtl v18.8h, v7.8b uxtl v18.8h, v7.8b
add x7, x0, x4, lsl #3 add x7, x0, x4, lsl #3
sub x0, x7, x4, lsl #1 sub x0, x7, x4, lsl #1
sub x20, x4, #0x0 neg x14, x4
neg x14, x20
addp v0.8h, v0.8h, v1.8h addp v0.8h, v0.8h, v1.8h
ldrb w8, [x7], #-1 ldrb w8, [x7], #-1
ldrb w9, [x0], #1 ldrb w9, [x0], #1

3
common/armv8/ih264_padding_neon_av8.s
View file

@ -90,8 +90,7 @@ ih264_pad_top_av8:
stp x19, x20, [sp, #-16]! stp x19, x20, [sp, #-16]!
sub x5, x0, x1 sub x5, x0, x1
sub x20, x1, #0 neg x6, x1
neg x6, x20
loop_neon_memcpy_mul_16: loop_neon_memcpy_mul_16:
// Load 16 bytes // Load 16 bytes

6
common/armv8/ih264_weighted_bi_pred_av8.s
View file

@ -145,8 +145,7 @@ ih264_weighted_bi_pred_luma_av8:
ldr w8, [sp, #80] //Load wt2 in w8 ldr w8, [sp, #80] //Load wt2 in w8
ldr w9, [sp, #88] //Load ofst1 in w9 ldr w9, [sp, #88] //Load ofst1 in w9
add w6, w6, #1 //w6 = log_WD + 1 add w6, w6, #1 //w6 = log_WD + 1
sub w20, w6, #0 //w10 = -(log_WD + 1) neg w10, w6 //w10 = -(log_WD + 1)
neg w10, w20
dup v0.8h, w10 //Q0 = -(log_WD + 1) (32-bit) dup v0.8h, w10 //Q0 = -(log_WD + 1) (32-bit)
ldr w10, [sp, #96] //Load ofst2 in w10 ldr w10, [sp, #96] //Load ofst2 in w10
ldr w11, [sp, #104] //Load ht in w11 ldr w11, [sp, #104] //Load ht in w11
@ -432,8 +431,7 @@ ih264_weighted_bi_pred_chroma_av8:
add w6, w6, #1 //w6 = log_WD + 1 add w6, w6, #1 //w6 = log_WD + 1
ldr w9, [sp, #88] //Load ofst1 in w9 ldr w9, [sp, #88] //Load ofst1 in w9
ldr w10, [sp, #96] //Load ofst2 in w10 ldr w10, [sp, #96] //Load ofst2 in w10
sub w20, w6, #0 //w20 = -(log_WD + 1) neg w20, w6 //w20 = -(log_WD + 1)
neg w20, w20
dup v0.8h, w20 //Q0 = -(log_WD + 1) (16-bit) dup v0.8h, w20 //Q0 = -(log_WD + 1) (16-bit)
ldr w11, [sp, #104] //Load ht in x11 ldr w11, [sp, #104] //Load ht in x11
ldr w12, [sp, #112] //Load wd in x12 ldr w12, [sp, #112] //Load wd in x12

6
common/armv8/ih264_weighted_pred_av8.s
View file

@ -125,8 +125,7 @@ ih264_weighted_pred_luma_av8:
sxtw x8, w8 sxtw x8, w8
dup v2.4h, w5 //D2 = wt (16-bit) dup v2.4h, w5 //D2 = wt (16-bit)
sub w20, w4, #0 //w9 = -log_WD neg w9, w4 //w9 = -log_WD
neg w9, w20
dup v3.8b, w6 //D3 = ofst (8-bit) dup v3.8b, w6 //D3 = ofst (8-bit)
cmp w8, #16 //check if wd is 16 cmp w8, #16 //check if wd is 16
dup v0.8h, w9 //Q0 = -log_WD (16-bit) dup v0.8h, w9 //Q0 = -log_WD (16-bit)
@ -354,8 +353,7 @@ ih264_weighted_pred_chroma_av8:
ldr w8, [sp, #80] //Load wd ldr w8, [sp, #80] //Load wd
sxtw x8, w8 sxtw x8, w8
sub w20, w4, #0 //w9 = -log_WD neg w9, w4 //w9 = -log_WD
neg w9, w20
dup v2.4s, w5 //Q1 = {wt_u (16-bit), wt_v (16-bit)} dup v2.4s, w5 //Q1 = {wt_u (16-bit), wt_v (16-bit)}