armv8: Add missing sign extension for WORD32 parameters

For WORD32 parameters, the upper half of the parameter
registers is undefined (even though it is zero in most cases).

When easily doable, use the 'w' register names for such
parameters instead of doing the sign extension with a
separate instruction.

This fixes crashes in some configurations, when built with
clang, which can pass nonzero bits in the high half of registers
more aggressively than GCC.

Also fix the parameter/register mappings; use wN register
names where applicable, and fix incorrect parameter
placement. (Some functions still were documented to have
only 4 parameters in registers.)

Change-Id: Icedf6503b064149d1a651ff1c6a76de5c01722ea
This commit is contained in:
Martin Storsjo 2016-09-05 16:15:02 +03:00
parent 391a0d9418
commit d91f49ad65
28 changed files with 525 additions and 381 deletions

View file

@ -56,19 +56,19 @@
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha_cb
//* @param[in] w2 - alpha_cb
//* Alpha Value for the boundary in U
//*
//* @param[in] x3 - beta_cb
//* @param[in] w3 - beta_cb
//* Beta Value for the boundary in U
//*
//* @param[in] sp(0) - alpha_cr
//* @param[in] w4 - alpha_cr
//* Alpha Value for the boundary in V
//*
//* @param[in] sp(4) - beta_cr
//* @param[in] w5 - beta_cr
//* Beta Value for the boundary in V
//*
//* @returns
@ -87,6 +87,7 @@ ih264_deblk_chroma_horz_bs4_av8:
// STMFD sp!,{x4-x6,x14} //
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x1, w1
mov x6, x5
mov x5, x4
sub x0, x0, x1, lsl #1 //x0 = uc_edgePixel pointing to p1 of chroma
@ -155,19 +156,19 @@ ih264_deblk_chroma_horz_bs4_av8:
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha_cb
//* @param[in] w2 - alpha_cb
//* Alpha Value for the boundary in U
//*
//* @param[in] x3 - beta_cb
//* @param[in] w3 - beta_cb
//* Beta Value for the boundary in U
//*
//* @param[in] sp(0) - alpha_cr
//* @param[in] w4 - alpha_cr
//* Alpha Value for the boundary in V
//*
//* @param[in] sp(4) - beta_cr
//* @param[in] w5 - beta_cr
//* Beta Value for the boundary in V
//*
//* @returns
@ -186,12 +187,13 @@ ih264_deblk_chroma_vert_bs4_av8:
// STMFD sp!,{x4,x5,x12,x14}
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x1, w1
sub x0, x0, #4 //point x0 to p1u of row0.
mov x12, x0 //keep a back up of x0 for buffer write
add x2, x2, x4, lsl #8 //x2 = (alpha_cr,alpha_cb)
add x3, x3, x5, lsl #8 //x3 = (beta_cr,beta_cb)
add w2, w2, w4, lsl #8 //w2 = (alpha_cr,alpha_cb)
add w3, w3, w5, lsl #8 //w3 = (beta_cr,beta_cb)
ld4 {v0.h, v1.h, v2.h, v3.h}[0], [x0], x1
ld4 {v0.h, v1.h, v2.h, v3.h}[1], [x0], x1
@ -292,28 +294,28 @@ ih264_deblk_chroma_vert_bs4_av8:
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha_cb
//* @param[in] w2 - alpha_cb
//* Alpha Value for the boundary in U
//*
//* @param[in] x3 - beta_cb
//* @param[in] w3 - beta_cb
//* Beta Value for the boundary in U
//*
//* @param[in] sp(0) - alpha_cr
//* @param[in] w4 - alpha_cr
//* Alpha Value for the boundary in V
//*
//* @param[in] sp(4) - beta_cr
//* @param[in] w5 - beta_cr
//* Beta Value for the boundary in V
//*
//* @param[in] sp(8) - u4_bs
//* @param[in] w6 - u4_bs
//* Packed Boundary strength array
//*
//* @param[in] sp(12) - pu1_cliptab_cb
//* @param[in] x7 - pu1_cliptab_cb
//* tc0_table for U
//*
//* @param[in] sp(16) - pu1_cliptab_cr
//* @param[in] sp(0) - pu1_cliptab_cr
//* tc0_table for V
//*
//* @returns
@ -332,8 +334,9 @@ ih264_deblk_chroma_horz_bslt4_av8:
// STMFD sp!,{x4-x9,x14} //
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x1, w1
mov x8, x7
mov x7, x6
mov w7, w6
ldr x9, [sp, #80]
sub x0, x0, x1, lsl #1 //x0 = uc_edgePixelU pointing to p1 of chroma U
rev w7, w7 //
@ -428,28 +431,28 @@ ih264_deblk_chroma_horz_bslt4_av8:
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha_cb
//* @param[in] w2 - alpha_cb
//* Alpha Value for the boundary in U
//*
//* @param[in] x3 - beta_cb
//* @param[in] w3 - beta_cb
//* Beta Value for the boundary in U
//*
//* @param[in] sp(0) - alpha_cr
//* @param[in] w4 - alpha_cr
//* Alpha Value for the boundary in V
//*
//* @param[in] sp(4) - beta_cr
//* @param[in] w5 - beta_cr
//* Beta Value for the boundary in V
//*
//* @param[in] sp(8) - u4_bs
//* @param[in] w6 - u4_bs
//* Packed Boundary strength array
//*
//* @param[in] sp(12) - pu1_cliptab_cb
//* @param[in] x7 - pu1_cliptab_cb
//* tc0_table for U
//*
//* @param[in] sp(16) - pu1_cliptab_cr
//* @param[in] sp(0) - pu1_cliptab_cr
//* tc0_table for V
//*
//* @returns
@ -468,11 +471,12 @@ ih264_deblk_chroma_vert_bslt4_av8:
// STMFD sp!,{x4-x7,x10-x12,x14}
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x1, w1
mov x10, x7
ldr x11, [sp, #80] //x11 = u4_bs
sub x0, x0, #4 //point x0 to p1u of row0.
add x2, x2, x4, lsl #8
add x3, x3, x5, lsl #8
add w2, w2, w4, lsl #8
add w3, w3, w5, lsl #8
mov x12, x0 //keep a back up of x0 for buffer write
ld4 {v0.h, v1.h, v2.h, v3.h}[0], [x0], x1
ld4 {v0.h, v1.h, v2.h, v3.h}[1], [x0], x1

View file

@ -60,19 +60,19 @@
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha
//* @param[in] w2 - alpha
//* Alpha Value for the boundary
//*
//* @param[in] x3 - beta
//* @param[in] w3 - beta
//* Beta Value for the boundary
//*
//* @param[in] sp(0) - u4_bs
//* @param[in] w4 - u4_bs
//* Packed Boundary strength array
//*
//* @param[in] sp(4) - pu1_cliptab
//* @param[in] x5 - pu1_cliptab
//* tc0_table
//*
//* @returns
@ -90,6 +90,7 @@ ih264_deblk_luma_horz_bslt4_av8:
// STMFD sp!,{x4-x7,x14}
push_v_regs
sxtw x1, w1
stp x19, x20, [sp, #-16]!
//LDRD x4,x5,[SP,#0x14] //x4 = ui_Bs , x5 = *puc_ClpTab
@ -214,13 +215,13 @@ ih264_deblk_luma_horz_bslt4_av8:
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha
//* @param[in] w2 - alpha
//* Alpha Value for the boundary
//*
//* @param[in] x3 - beta
//* @param[in] w3 - beta
//* Beta Value for the boundary
//*
//* @returns
@ -240,6 +241,7 @@ ih264_deblk_luma_horz_bs4_av8:
// STMFD sp!,{x12,x14}
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x1, w1
// Init
dup v0.16b, w2 //duplicate alpha
@ -401,19 +403,19 @@ ih264_deblk_luma_horz_bs4_av8:
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha
//* @param[in] w2 - alpha
//* Alpha Value for the boundary
//*
//* @param[in] x3 - beta
//* @param[in] w3 - beta
//* Beta Value for the boundary
//*
//* @param[in] sp(0) - u4_bs
//* @param[in] w4 - u4_bs
//* Packed Boundary strength array
//*
//* @param[in] sp(4) - pu1_cliptab
//* @param[in] x5 - pu1_cliptab
//* tc0_table
//*
//* @returns
@ -432,6 +434,7 @@ ih264_deblk_luma_vert_bslt4_av8:
// STMFD sp!,{x12,x14}
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x1, w1
sub x0, x0, #4 //pointer uc_edgePixel-4
mov x12, x4
@ -743,13 +746,13 @@ ih264_deblk_luma_vert_bslt4_av8:
//* @param[in] x0 - pu1_src
//* Pointer to the src sample q0
//*
//* @param[in] x1 - src_strd
//* @param[in] w1 - src_strd
//* Source stride
//*
//* @param[in] x2 - alpha
//* @param[in] w2 - alpha
//* Alpha Value for the boundary
//*
//* @param[in] x3 - beta
//* @param[in] w3 - beta
//* Beta Value for the boundary
//*
//* @returns

View file

@ -95,11 +95,11 @@
// x0 => puc_src1
// x1 => puc_src2
// x2 => puc_dst
// x3 => src_strd1
// [sp] => src_strd2 (x4)
// [sp+4] => dst_strd (x5)
// [sp+8] => ht (x6)
// [sp+12] => wd (x7)
// w3 => src_strd1
// w4 => src_strd2
// w5 => dst_strd
// w6 => ht
// w7 => wd
//
.text
.p2align 2
@ -113,6 +113,9 @@ ih264_default_weighted_pred_luma_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
cmp w7, #16
beq loop_16 //branch if wd is 16
cmp w7, #8
@ -270,11 +273,11 @@ end_loops:
// x0 => puc_src1
// x1 => puc_src2
// x2 => puc_dst
// x3 => src_strd1
// [sp] => src_strd2 (x4)
// [sp+4] => dst_strd (x5)
// [sp+8] => ht (x6)
// [sp+12] => wd (x7)
// w3 => src_strd1
// w4 => src_strd2
// w5 => dst_strd
// w6 => ht
// w7 => wd
//
@ -286,6 +289,9 @@ ih264_default_weighted_pred_chroma_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
cmp w7, #8
beq loop_8_uv //branch if wd is 8
cmp w7, #4

View file

@ -98,12 +98,12 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => u1_dx
// x5 => u1_dy
// x6 => height
// x7 => width
// w2 => src_strd
// w3 => dst_strd
// w4 => u1_dx
// w5 => u1_dy
// w6 => height
// w7 => width
//
.text
.p2align 2
@ -120,6 +120,12 @@ ih264_inter_pred_chroma_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
sxtw x6, w6
sxtw x7, w7

View file

@ -89,10 +89,10 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
.text
.p2align 2
@ -111,6 +111,10 @@ ih264_inter_pred_luma_horz_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
sub x0, x0, #2 //pu1_src-2
sub x14, x4, #16
movi v0.8b, #5 //filter coeff

View file

@ -89,10 +89,10 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
.text
.p2align 2
@ -108,6 +108,10 @@ ih264_inter_pred_luma_vert_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
sub x0, x0, x2, lsl #1 //pu1_src-2*src_strd

View file

@ -65,10 +65,10 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x7 => ht
// x12 => wd
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
.text
.p2align 2
@ -82,6 +82,10 @@ ih264_inter_pred_luma_copy_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
mov x12, x5
mov x7, x4
@ -228,14 +232,16 @@ end_inner_loop_wd_16:
// Register Usage
// x0 : pi2_src
// x1 : pu1_out
// x2 : src_strd
// x3 : out_strd
// w2 : src_strd
// w3 : out_strd
// Neon registers d0-d7, d16-d30 are used
// No need for pushing arm and neon registers
.global ih264_interleave_copy_av8
ih264_interleave_copy_av8:
push_v_regs
sxtw x2, w2
sxtw x3, w3
ld1 {v2.8b}, [x0], x2 //load src plane 1 => d2 &pred palne 2 => d3
ld1 {v3.8b}, [x0], x2
mov v2.d[1], v3.d[0]

View file

@ -52,10 +52,10 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
.text
@ -71,6 +71,10 @@ ih264_inter_pred_luma_horz_hpel_vert_hpel_av8:
//store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
sub x0, x0, x2, lsl #1 //pu1_src-2*src_strd
sub x0, x0, #2 //pu1_src-2

View file

@ -105,12 +105,12 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// x7 => dydx
// x9 => *pu1_tmp
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
// x6 => *pu1_tmp
// w7 => dydx
.text
.p2align 2
@ -126,6 +126,10 @@ ih264_inter_pred_luma_horz_hpel_vert_qpel_av8:
// store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
@ -134,7 +138,8 @@ ih264_inter_pred_luma_horz_hpel_vert_qpel_av8:
mov x9, x6
lsr x7, x7, #3 // dydx >> 2 followed by dydx & 0x3 and dydx>>1 to obtain the deciding bit
// by writing to w7 here, we clear the upper half of x7
lsr w7, w7, #3 // dydx >> 2 followed by dydx & 0x3 and dydx>>1 to obtain the deciding bit
add x7, x7, #2
mov x6, #48

View file

@ -94,11 +94,11 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// x7 => dydx
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
// w7 => dydx
.text
.p2align 2
@ -114,6 +114,10 @@ ih264_inter_pred_luma_horz_qpel_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
and x7, x7, #3 //Finds x-offset

View file

@ -105,12 +105,12 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// x6 => dydx
// x9 => *pu1_tmp
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
// x6 => *pu1_tmp
// w7 => dydx
.text
.p2align 2
@ -125,11 +125,15 @@ ih264_inter_pred_luma_horz_qpel_vert_hpel_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
sub x0, x0, x2, lsl #1 //pu1_src-2*src_strd
sub x0, x0, #2 //pu1_src-2
mov x9, x6
mov x6, x7
mov w6, w7
and x6, x6, #2 // dydx & 0x3 followed by dydx>>1 and dydx<<1

View file

@ -104,11 +104,11 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// x6 => dydx
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
// w7 => dydx
.text
.p2align 2
@ -122,7 +122,11 @@ ih264_inter_pred_luma_horz_qpel_vert_qpel_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
mov x6, x7
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
mov w6, w7
and x7, x6, #3
add x7, x0, x7, lsr #1 //pu1_pred_vert = pu1_src + (x_offset>>1)

View file

@ -94,11 +94,11 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ht
// x5 => wd
// x7 => dydx
// w2 => src_strd
// w3 => dst_strd
// w4 => ht
// w5 => wd
// w7 => dydx
.text
.p2align 2
@ -112,6 +112,10 @@ ih264_inter_pred_luma_vert_qpel_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x2, w2
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
and x7, x7, #12 //Finds y-offset

View file

@ -100,9 +100,9 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
@ -113,13 +113,14 @@ ih264_intra_pred_chroma_8x8_mode_dc_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
mov x19, #5
ands x6, x4, x19
mov w19, #5
ands w6, w4, w19
beq none_available
cmp x6, #1
cmp w6, #1
beq left_only_available
cmp x6, #4
cmp w6, #4
beq top_only_available
all_available:
@ -251,9 +252,9 @@ end_func:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_chroma_8x8_mode_horz_av8
@ -263,6 +264,7 @@ ih264_intra_pred_chroma_8x8_mode_horz_av8:
push_v_regs
sxtw x3, w3
ld1 {v0.8h}, [x0]
dup v10.8h, v0.h[7]
@ -332,9 +334,9 @@ ih264_intra_pred_chroma_8x8_mode_horz_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_chroma_8x8_mode_vert_av8
@ -342,6 +344,7 @@ ih264_intra_pred_chroma_8x8_mode_horz_av8:
ih264_intra_pred_chroma_8x8_mode_vert_av8:
push_v_regs
sxtw x3, w3
add x0, x0, #18
ld1 {v0.8b, v1.8b}, [x0]
@ -405,15 +408,16 @@ ih264_intra_pred_chroma_8x8_mode_vert_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_chroma_8x8_mode_plane_av8
ih264_intra_pred_chroma_8x8_mode_plane_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 {v0.2s}, [x0]
add x10, x0, #10

View file

@ -98,9 +98,9 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_16x16_mode_vert_av8
@ -108,6 +108,7 @@
ih264_intra_pred_luma_16x16_mode_vert_av8:
push_v_regs
sxtw x3, w3
add x0, x0, #17
@ -181,9 +182,9 @@ ih264_intra_pred_luma_16x16_mode_vert_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_16x16_mode_horz_av8
@ -192,6 +193,7 @@ ih264_intra_pred_luma_16x16_mode_horz_av8:
push_v_regs
sxtw x3, w3
ld1 {v0.16b}, [x0]
@ -283,9 +285,9 @@ ih264_intra_pred_luma_16x16_mode_horz_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_16x16_mode_dc_av8
@ -295,18 +297,19 @@ ih264_intra_pred_luma_16x16_mode_dc_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
sub v0.16b, v0.16b, v0.16b
sub v1.16b, v1.16b, v1.16b
mov w10, #0
mov w11 , #3
ands x6, x4, #0x01
ands w6, w4, #0x01
beq top_available //LEFT NOT AVAILABLE
ld1 {v0.16b}, [x0]
add w10, w10, #8
add w11, w11, #1
top_available:
ands x6, x4, #0x04
ands w6, w4, #0x04
beq none_available
add x6, x0, #17
ld1 {v1.16b}, [x6]
@ -314,7 +317,7 @@ top_available:
add w11, w11, #1
b summation
none_available:
cmp x4, #0
cmp w4, #0
bne summation
mov w15, #128
dup v20.16b, w15
@ -410,15 +413,16 @@ end_func:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_16x16_mode_plane_av8
ih264_intra_pred_luma_16x16_mode_plane_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
mov x2, x1
add x1, x0, #17
add x0, x0, #15

View file

@ -102,15 +102,16 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_vert_av8
ih264_intra_pred_luma_4x4_mode_vert_av8:
push_v_regs
sxtw x3, w3
add x0, x0, #5
@ -171,9 +172,9 @@ ih264_intra_pred_luma_4x4_mode_vert_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
@ -182,6 +183,7 @@ ih264_intra_pred_luma_4x4_mode_vert_av8:
ih264_intra_pred_luma_4x4_mode_horz_av8:
push_v_regs
sxtw x3, w3
ld1 {v1.s}[0], [x0]
dup v0.8b, v1.b[3]
@ -246,9 +248,9 @@ ih264_intra_pred_luma_4x4_mode_horz_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
@ -261,8 +263,9 @@ ih264_intra_pred_luma_4x4_mode_dc_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ands x5, x4, #0x01
ands w5, w4, #0x01
beq top_available //LEFT NOT AVAILABLE
add x10, x0, #3
@ -277,7 +280,7 @@ ih264_intra_pred_luma_4x4_mode_dc_av8:
ldrb w8, [x10], #-1
sxtw x8, w8
add x5, x5, x7
ands x11, x4, #0x04 // CHECKING IF TOP_AVAILABLE ELSE BRANCHING TO ONLY LEFT AVAILABLE
ands w11, w4, #0x04 // CHECKING IF TOP_AVAILABLE ELSE BRANCHING TO ONLY LEFT AVAILABLE
add x5, x5, x8
beq left_available
add x10, x0, #5
@ -304,7 +307,7 @@ ih264_intra_pred_luma_4x4_mode_dc_av8:
b end_func
top_available: // ONLT TOP AVAILABLE
ands x11, x4, #0x04 // CHECKING TOP AVAILABILTY OR ELSE BRANCH TO NONE AVAILABLE
ands w11, w4, #0x04 // CHECKING TOP AVAILABILTY OR ELSE BRANCH TO NONE AVAILABLE
beq none_available
add x10, x0, #5
@ -401,9 +404,9 @@ end_func:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_diag_dl_av8
@ -413,6 +416,7 @@ ih264_intra_pred_luma_4x4_mode_diag_dl_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
add x0, x0, #5
sub x5, x3, #2
@ -488,9 +492,9 @@ end_func_diag_dl:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_diag_dr_av8
@ -499,6 +503,7 @@ ih264_intra_pred_luma_4x4_mode_diag_dr_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 {v0.8b}, [x0]
@ -571,9 +576,9 @@ end_func_diag_dr:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_vert_r_av8
@ -582,6 +587,7 @@ ih264_intra_pred_luma_4x4_mode_vert_r_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 {v0.8b}, [x0]
@ -656,9 +662,9 @@ end_func_vert_r:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_horz_d_av8
@ -667,6 +673,7 @@ ih264_intra_pred_luma_4x4_mode_horz_d_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 {v0.8b}, [x0]
add x0, x0, #1
@ -743,9 +750,9 @@ end_func_horz_d:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_vert_l_av8
@ -754,6 +761,7 @@ ih264_intra_pred_luma_4x4_mode_vert_l_av8:
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
add x0, x0, #4
ld1 {v0.8b}, [x0]
add x0, x0, #1
@ -825,9 +833,9 @@ end_func_vert_l:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_4x4_mode_horz_u_av8
@ -835,6 +843,7 @@ end_func_vert_l:
ih264_intra_pred_luma_4x4_mode_horz_u_av8:
push_v_regs
sxtw x3, w3
stp x19, x20, [sp, #-16]!
mov x10, x0
ld1 {v0.8b}, [x0]

View file

@ -102,9 +102,9 @@
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_vert_av8
@ -114,6 +114,7 @@ ih264_intra_pred_luma_8x8_mode_vert_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
//stp x19, x20,[sp,#-16]!
sxtw x3, w3
add x0, x0, #9
ld1 {v0.8b}, [x0]
@ -180,9 +181,9 @@ ih264_intra_pred_luma_8x8_mode_vert_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_horz_av8
@ -194,6 +195,7 @@ ih264_intra_pred_luma_8x8_mode_horz_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
add x0, x0, #7
ldrb w5, [x0], #-1
@ -284,9 +286,9 @@ ih264_intra_pred_luma_8x8_mode_horz_av8:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_dc_av8
@ -297,9 +299,10 @@ ih264_intra_pred_luma_8x8_mode_dc_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
sxtw x3, w3
stp x19, x20, [sp, #-16]!
ands x6, x4, #0x01
ands w6, w4, #0x01
beq top_available //LEFT NOT AVAILABLE
add x10, x0, #7
@ -323,7 +326,7 @@ ih264_intra_pred_luma_8x8_mode_dc_av8:
ldrb w8, [x10], -1
sxtw x8, w8
add x5, x5, x7
ands x11, x4, #0x04 // CHECKING IF TOP_AVAILABLE ELSE BRANCHING TO ONLY LEFT AVAILABLE
ands w11, w4, #0x04 // CHECKING IF TOP_AVAILABLE ELSE BRANCHING TO ONLY LEFT AVAILABLE
add x5, x5, x8
ldrb w6, [x10], -1
sxtw x6, w6
@ -350,7 +353,7 @@ ih264_intra_pred_luma_8x8_mode_dc_av8:
b end_func
top_available: // ONLT TOP AVAILABLE
ands x11, x4, #0x04 // CHECKING TOP AVAILABILTY OR ELSE BRANCH TO NONE AVAILABLE
ands w11, w4, #0x04 // CHECKING TOP AVAILABILTY OR ELSE BRANCH TO NONE AVAILABLE
beq none_available
add x10, x0, #9
@ -451,9 +454,9 @@ end_func:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_diag_dl_av8
@ -462,6 +465,7 @@ ih264_intra_pred_luma_8x8_mode_diag_dl_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
add x0, x0, #9
sub x5, x3, #4
@ -553,9 +557,9 @@ end_func_diag_dl:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_diag_dr_av8
@ -565,6 +569,7 @@ ih264_intra_pred_luma_8x8_mode_diag_dr_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 { v0.16b}, [x0]
@ -653,9 +658,9 @@ end_func_diag_dr:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_vert_r_av8
@ -665,6 +670,7 @@ ih264_intra_pred_luma_8x8_mode_vert_r_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 { v0.16b}, [x0]
mov v1.d[0], v0.d[1]
@ -779,9 +785,9 @@ end_func_vert_r:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_horz_d_av8
@ -790,6 +796,7 @@ ih264_intra_pred_luma_8x8_mode_horz_d_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 { v0.16b}, [x0]
mov v1.d[0], v0.d[1]
@ -909,9 +916,9 @@ end_func_horz_d:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_vert_l_av8
@ -921,6 +928,7 @@ ih264_intra_pred_luma_8x8_mode_vert_l_av8:
// STMFD sp!, {x4-x12, x14} //Restoring registers from stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
add x0, x0, #9
ld1 { v0.16b}, [x0]
mov v1.d[0], v0.d[1]
@ -1017,9 +1025,9 @@ end_func_vert_l:
//**************Variables Vs Registers*****************************************
// x0 => *pu1_src
// x1 => *pu1_dst
// x2 => src_strd
// x3 => dst_strd
// x4 => ui_neighboravailability
// w2 => src_strd
// w3 => dst_strd
// w4 => ui_neighboravailability
.global ih264_intra_pred_luma_8x8_mode_horz_u_av8
@ -1028,6 +1036,7 @@ ih264_intra_pred_luma_8x8_mode_horz_u_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
stp x19, x20, [sp, #-16]!
sxtw x3, w3
ld1 {v0.8b}, [x0]
ld1 {v1.b}[7], [x0]

View file

@ -103,11 +103,11 @@
//x0 => *pi2_src
//x1 => *pu1_pred
//x2 => *pu1_out
//x3 => pred_strd
//x4 => out_strd
//w3 => pred_strd
//w4 => out_strd
//x5 => *pu2_iscal_mat
//x6 => *pu2_weigh_mat
//x7 => u4_qp_div_6
//w7 => u4_qp_div_6
// => pi4_tmp
// => iq_start_idx
// => pi2_dc_ld_addr
@ -119,6 +119,8 @@
ih264_iquant_itrans_recon_4x4_av8:
push_v_regs
sxtw x3, w3
sxtw x4, w4
dup v30.4s, w7 //Populate the u4_qp_div_6 in Q15
@ -292,11 +294,11 @@ skip_loading_luma_dc_src:
//x0 => *pi2_src
//x1 => *pu1_pred
//x2 => *pu1_out
//x3 => pred_strd
//x4 => out_strd
//w3 => pred_strd
//w4 => out_strd
//x5 => *pu2_iscal_mat
//x6 => *pu2_weigh_mat
//x7 => u4_qp_div_6
//w7 => u4_qp_div_6
//sp => pi4_tmp
//sp#8 => *pi2_dc_src
@ -315,6 +317,8 @@ ih264_iquant_itrans_recon_chroma_4x4_av8:
//reduce sp by 64
push_v_regs
sxtw x3, w3
sxtw x4, w4
dup v30.4s, w7 //Populate the u4_qp_div_6 in Q15
@ -512,11 +516,11 @@ ih264_iquant_itrans_recon_chroma_4x4_av8:
//x0 => *pi2_src
//x1 => *pu1_pred
//x2 => *pu1_out
//x3 => pred_strd
//x4 => out_strd
//w3 => pred_strd
//w4 => out_strd
//x5 => *pu2_iscal_mat
//x6 => *pu2_weigh_mat
//x7 => u4_qp_div_6
//w7 => u4_qp_div_6
//NOT USED => pi4_tmp
//NOT USED => iq_start_idx
//NOT USED => pi2_dc_ld_addr
@ -525,6 +529,8 @@ ih264_iquant_itrans_recon_chroma_4x4_av8:
ih264_iquant_itrans_recon_8x8_av8:
push_v_regs
sxtw x3, w3
sxtw x4, w4
ld1 {v8.8h -v11.8h}, [x5], #64
ld1 {v12.8h-v15.8h}, [x5]

View file

@ -104,11 +104,11 @@
//x0 => *pi2_src
//x1 => *pu1_pred
//x2 => *pu1_out
//x3 => pred_strd
//x4 => out_strd
//w3 => pred_strd
//w4 => out_strd
//x5 => *pu2_iscal_mat
//x6 => *pu2_weigh_mat
//x7 => u4_qp_div_6
//w7 => u4_qp_div_6
// => pi4_tmp
// => iq_start_idx
// => pi2_dc_ld_addr
@ -119,6 +119,8 @@
.global ih264_iquant_itrans_recon_4x4_dc_av8
ih264_iquant_itrans_recon_4x4_dc_av8:
sxtw x3, w3
sxtw x4, w4
ldr w8, [sp, #8] //Loads iq_start_idx
subs w8, w8, #1 // if x8 == 1 => intra case , so result of subtraction is zero and z flag is set
@ -209,11 +211,11 @@ donot_use_pi2_src_luma_dc:
// x0 : pi2_src
// x1 : pu1_pred
// x2 : pu1_out
// x3 : pred_strd
// x4 : out_strd
// w3 : pred_strd
// w4 : out_strd
// x5 : pu2_iscal_mat
// x6 : pu2_weigh_mat
// x7 : u4_qp_div_6
// w7 : u4_qp_div_6
// : pi2_tmp
// : pi2_dc_src
// Neon registers d0-d7, d16-d30 are used
@ -223,6 +225,8 @@ donot_use_pi2_src_luma_dc:
.global ih264_iquant_itrans_recon_chroma_4x4_dc_av8
ih264_iquant_itrans_recon_chroma_4x4_dc_av8:
sxtw x3, w3
sxtw x4, w4
ldr x0, [sp, #8]
push_v_regs
ld1 {v0.h}[0], [x0]
@ -327,11 +331,11 @@ ih264_iquant_itrans_recon_chroma_4x4_dc_av8:
//x0 => *pi2_src
//x1 => *pu1_pred
//x2 => *pu1_out
//x3 => pred_strd
//x4 => out_strd
//w3 => pred_strd
//w4 => out_strd
//x5 => *pu2_iscal_mat
//x6 => *pu2_weigh_mat
//x7 => u4_qp_div_6
//w7 => u4_qp_div_6
//NOT USED => pi4_tmp
//NOT USED => iq_start_idx
//NOT USED => pi2_dc_ld_addr
@ -340,6 +344,8 @@ ih264_iquant_itrans_recon_chroma_4x4_dc_av8:
ih264_iquant_itrans_recon_8x8_dc_av8:
push_v_regs
sxtw x3, w3
sxtw x4, w4
ld1 {v1.h}[0], [x5]
ld1 {v2.h}[0], [x6]

View file

@ -74,7 +74,7 @@
//**************Variables Vs Registers*************************
// x0 => *pu1_dst
// x1 => *pu1_src
// x2 => num_bytes
// w2 => num_bytes
@ -89,7 +89,7 @@ loop_neon_memcpy_mul_8:
ld1 {v0.8b}, [x1], #8
st1 {v0.8b}, [x0], #8
subs x2, x2, #8
subs w2, w2, #8
bne loop_neon_memcpy_mul_8
ret
@ -103,34 +103,34 @@ loop_neon_memcpy_mul_8:
//**************Variables Vs Registers*************************
// x0 => *pu1_dst
// x1 => *pu1_src
// x2 => num_bytes
// w2 => num_bytes
.global ih264_memcpy_av8
ih264_memcpy_av8:
subs x2, x2, #8
subs w2, w2, #8
blt arm_memcpy
loop_neon_memcpy:
// Memcpy 8 bytes
ld1 {v0.8b}, [x1], #8
st1 {v0.8b}, [x0], #8
subs x2, x2, #8
subs w2, w2, #8
bge loop_neon_memcpy
cmn x2, #8
cmn w2, #8
beq end_func1
arm_memcpy:
add x2, x2, #8
add w2, w2, #8
loop_arm_memcpy:
ldrb w3, [x1], #1
sxtw x3, w3
strb w3, [x0], #1
sxtw x3, w3
subs x2, x2, #1
subs w2, w2, #1
bne loop_arm_memcpy
ret
end_func1:
@ -156,7 +156,7 @@ loop_memset_mul_8:
// Memset 8 bytes
st1 {v0.8b}, [x0], #8
subs x2, x2, #8
subs w2, w2, #8
bne loop_memset_mul_8
ret
@ -167,33 +167,33 @@ loop_memset_mul_8:
// UWORD32 num_bytes)
//**************Variables Vs Registers*************************
// x0 => *pu1_dst
// x1 => value
// x2 => num_bytes
// w1 => value
// w2 => num_bytes
.global ih264_memset_av8
ih264_memset_av8:
subs x2, x2, #8
subs w2, w2, #8
blt arm_memset
dup v0.8b, w1
loop_neon_memset:
// Memcpy 8 bytes
st1 {v0.8b}, [x0], #8
subs x2, x2, #8
subs w2, w2, #8
bge loop_neon_memset
cmn x2, #8
cmn w2, #8
beq end_func2
arm_memset:
add x2, x2, #8
add w2, w2, #8
loop_arm_memset:
strb w1, [x0], #1
sxtw x1, w1
subs x2, x2, #1
subs w2, w2, #1
bne loop_arm_memset
ret
end_func2:
@ -208,8 +208,8 @@ end_func2:
// UWORD32 num_words)
//**************Variables Vs Registers*************************
// x0 => *pu2_dst
// x1 => value
// x2 => num_words
// w1 => value
// w2 => num_words
.global ih264_memset_16bit_mul_8_av8
@ -224,7 +224,7 @@ loop_memset_16bit_mul_8:
st1 {v0.4h}, [x0], #8
st1 {v0.4h}, [x0], #8
subs x2, x2, #8
subs w2, w2, #8
bne loop_memset_16bit_mul_8
ret
@ -236,15 +236,15 @@ loop_memset_16bit_mul_8:
// UWORD32 num_words)
//**************Variables Vs Registers*************************
// x0 => *pu2_dst
// x1 => value
// x2 => num_words
// w1 => value
// w2 => num_words
.global ih264_memset_16bit_av8
ih264_memset_16bit_av8:
subs x2, x2, #8
subs w2, w2, #8
blt arm_memset_16bit
dup v0.4h, w1
loop_neon_memset_16bit:
@ -252,18 +252,18 @@ loop_neon_memset_16bit:
st1 {v0.4h}, [x0], #8
st1 {v0.4h}, [x0], #8
subs x2, x2, #8
subs w2, w2, #8
bge loop_neon_memset_16bit
cmn x2, #8
cmn w2, #8
beq end_func3
arm_memset_16bit:
add x2, x2, #8
add w2, w2, #8
loop_arm_memset_16bit:
strh w1, [x0], #2
sxtw x1, w1
subs x2, x2, #1
subs w2, w2, #1
bne loop_arm_memset_16bit
ret

View file

@ -76,9 +76,9 @@
// WORD32 pad_size)
//**************Variables Vs Registers*************************
// x0 => *pu1_src
// x1 => src_strd
// x2 => wd
// x3 => pad_size
// w1 => src_strd
// w2 => wd
// w3 => pad_size
.global ih264_pad_top_av8
@ -86,6 +86,7 @@ ih264_pad_top_av8:
// STMFD sp!, {x4-x11,x14} //stack stores the values of the arguments
push_v_regs
sxtw x1, w1
stp x19, x20, [sp, #-16]!
sub x5, x0, x1
@ -96,15 +97,15 @@ loop_neon_memcpy_mul_16:
// Load 16 bytes
ld1 {v0.8b, v1.8b}, [x0], #16
mov x4, x5
mov x7, x3
mov w7, w3
add x5, x5, #16
loop_neon_pad_top:
st1 {v0.8b, v1.8b}, [x4], x6
subs x7, x7, #1
subs w7, w7, #1
bne loop_neon_pad_top
subs x2, x2, #16
subs w2, w2, #16
bne loop_neon_memcpy_mul_16
// LDMFD sp!,{x4-x11,pc} //Reload the registers from SP
@ -160,9 +161,9 @@ loop_neon_pad_top:
// WORD32 pad_size)
//**************Variables Vs Registers*************************
// x0 => *pu1_src
// x1 => src_strd
// x2 => ht
// x3 => pad_size
// w1 => src_strd
// w2 => ht
// w3 => pad_size
@ -172,6 +173,8 @@ ih264_pad_left_luma_av8:
// STMFD sp!, {x4-x11,x14} //stack stores the values of the arguments
push_v_regs
sxtw x1, w1
sxtw x3, w3
stp x19, x20, [sp, #-16]!
@ -218,7 +221,7 @@ loop_16: // /*hard coded for width=16 ,height =
st1 {v2.16b}, [x4], x1 // 16 bytes store
dup v4.16b, w10
dup v6.16b, w11
subs x2, x2, #8
subs w2, w2, #8
st1 {v4.16b}, [x4], x1 // 16 bytes store
st1 {v6.16b}, [x4], x1 // 16 bytes store
bne loop_16
@ -271,7 +274,7 @@ loop_32: // /*hard coded for width=32 ,height =8
st1 {v4.16b}, [x4], #16 // 16 bytes store
dup v6.16b, w11
st1 {v4.16b}, [x4], x6 // 16 bytes store
subs x2, x2, #8
subs w2, w2, #8
st1 {v6.16b}, [x4], #16 // 16 bytes store
st1 {v6.16b}, [x4], x6 // 16 bytes store
bne loop_32
@ -333,9 +336,9 @@ end_func:
// WORD32 pad_size)
//{
// x0 => *pu1_src
// x1 => src_strd
// x2 => ht
// x3 => pad_size
// w1 => src_strd
// w2 => ht
// w3 => pad_size
@ -345,6 +348,8 @@ ih264_pad_left_chroma_av8:
// STMFD sp!, {x4-x11, x14} //stack stores the values of the arguments
push_v_regs
sxtw x1, w1
sxtw x3, w3
stp x19, x20, [sp, #-16]!
sub x4, x0, x3
@ -374,7 +379,7 @@ loop_32_l_c: // /*hard coded for width=32 ,height =
dup v6.8h, w11
st1 {v4.16b}, [x4], #16 // 16 bytes store
st1 {v4.16b}, [x4], x6 // 16 bytes store
subs x2, x2, #4
subs w2, w2, #4
st1 {v6.16b}, [x4], #16 // 16 bytes store
st1 {v6.16b}, [x4], x6 // 16 bytes store
@ -403,7 +408,7 @@ loop_32_l_c: // /*hard coded for width=32 ,height =
dup v6.8h, w11
st1 {v4.16b}, [x4], #16 // 16 bytes store
st1 {v4.16b}, [x4], x6 // 16 bytes store
subs x2, x2, #4
subs w2, w2, #4
st1 {v6.16b}, [x4], #16 // 16 bytes store
st1 {v6.16b}, [x4], x6 // 16 bytes store
@ -500,9 +505,9 @@ end_func_l_c:
//}
//
// x0 => *pu1_src
// x1 => src_strd
// x2 => ht
// x3 => pad_size
// w1 => src_strd
// w2 => ht
// w3 => pad_size
@ -512,6 +517,8 @@ ih264_pad_right_luma_av8:
// STMFD sp!, {x4-x11, x14} //stack stores the values of the arguments
push_v_regs
sxtw x1, w1
sxtw x3, w3
stp x19, x20, [sp, #-16]!
mov x4, x0
@ -558,7 +565,7 @@ loop_16_r: // /*hard coded for width=16 ,height =8,16*/
st1 {v2.16b}, [x4], x1 // 16 bytes store
dup v4.16b, w10
dup v6.16b, w11
subs x2, x2, #8
subs w2, w2, #8
st1 {v4.16b}, [x4], x1 // 16 bytes store
st1 {v6.16b}, [x4], x1 // 16 bytes store
bne loop_16_r
@ -611,7 +618,7 @@ loop_32_r: // /*hard coded for width=32 ,height =
st1 {v4.16b}, [x4], #16 // 16 bytes store
dup v6.16b, w11
st1 {v4.16b}, [x4], x6 // 16 bytes store
subs x2, x2, #8
subs w2, w2, #8
st1 {v6.16b}, [x4], #16 // 16 bytes store
st1 {v6.16b}, [x4], x6 // 16 bytes store
bne loop_32_r
@ -672,9 +679,9 @@ end_func_r:
// WORD32 ht,
// WORD32 pad_size)
// x0 => *pu1_src
// x1 => src_strd
// x2 => ht
// x3 => pad_size
// w1 => src_strd
// w2 => ht
// w3 => pad_size
@ -684,6 +691,8 @@ ih264_pad_right_chroma_av8:
// STMFD sp!, {x4-x11, x14} //stack stores the values of the arguments
push_v_regs
sxtw x1, w1
sxtw x3, w3
stp x19, x20, [sp, #-16]!
mov x4, x0
@ -706,7 +715,7 @@ loop_32_r_c: // /*hard coded for width=32 ,height =8,4*/
st1 {v2.16b}, [x4], #16 // 16 bytes store
dup v4.8h, w10
st1 {v2.16b}, [x4], x6 // 16 bytes store
subs x2, x2, #4
subs w2, w2, #4
ldrh w11, [x0]
add x0, x0, x1
sxtw x11, w11
@ -740,7 +749,7 @@ loop_32_r_c: // /*hard coded for width=32 ,height =8,4*/
st1 {v4.16b}, [x4], #16 // 16 bytes store
dup v6.8h, w11
st1 {v4.16b}, [x4], x6 // 16 bytes store
subs x2, x2, #4
subs w2, w2, #4
st1 {v6.16b}, [x4], #16 // 16 bytes store
st1 {v6.16b}, [x4], x6 // 16 bytes store

View file

@ -69,18 +69,20 @@ ih264_resi_trans_quant_4x4_av8:
//x0 :pointer to src buffer
//x1 :pointer to pred buffer
//x2 :pointer to dst buffer
//x3 :source stride
//x4 :pred stride
//x5 :scale matirx,
//w3 :source stride
//w4 :pred stride
//w5 :scale matirx,
//x6 :threshold matrix
//x7 :qbits
//x8 :round factor
//w7 :qbits
//w8 :round factor
//x9 :nnz
//x10 :pointer to store non quantized dc value
sxtw x3, w3
sxtw x4, w4
ldr w8, [sp, #64] //load round factor
ldr x10, [sp, #80] //load addres for non quant val
neg x7, x7 //negate the qbit value for usiing lsl
neg w7, w7 //negate the qbit value for usiing lsl
ldr x9, [sp, #72]
//------------fucntion loading done----------------;
@ -258,18 +260,20 @@ ih264_resi_trans_quant_chroma_4x4_av8:
//x0 :pointer to src buffer
//x1 :pointer to pred buffer
//x2 :pointer to dst buffer
//x3 :source stride
//x4 :pred stride
//w3 :source stride
//w4 :pred stride
//x5 :scale matirx,
//x6 :threshold matrix
//x7 :qbits
//x8 :round factor
//w7 :qbits
//w8 :round factor
//x9 :nnz
//x10 :pointer to store non quantized dc value
sxtw x3, w3
sxtw x4, w4
ldr w8, [sp, #64] //load round factor
ldr x10, [sp, #80] //load addres for non quant val
neg x7, x7 //negate the qbit value for usiing lsl
neg w7, w7 //negate the qbit value for usiing lsl
ldr x9, [sp, #72]
//------------fucntion loading done----------------;
@ -438,10 +442,10 @@ ih264_resi_trans_quant_chroma_4x4_av8:
//* arguments : x0 :pointer to src buffer
// x1 :pointer to dst buffer
// x2 :pu2_scale_matrix
// x2 :pu2_threshold_matrix
// x3 :u4_qbits
// x4 :u4_round_factor
// x5 :pu1_nnz
// x3 :pu2_threshold_matrix
// w4 :u4_qbits
// w5 :u4_round_factor
// x6 :pu1_nnz
// values returned : none
//
// register usage :
@ -469,8 +473,8 @@ ih264_hadamard_quant_4x4_av8:
//x1 :pointer to dst buffer
//x2 :pu2_scale_matrix
//x3 :pu2_threshold_matrix
//x4 :u4_qbits
//x5 :u4_round_factor
//w4 :u4_qbits
//w5 :u4_round_factor
//x6 :pu1_nnz
push_v_regs
@ -585,10 +589,10 @@ ih264_hadamard_quant_4x4_av8:
//* arguments : x0 :pointer to src buffer
// x1 :pointer to dst buffer
// x2 :pu2_scale_matrix
// x2 :pu2_threshold_matrix
// x3 :u4_qbits
// x4 :u4_round_factor
// x5 :pu1_nnz
// x3 :pu2_threshold_matrix
// w4 :u4_qbits
// w5 :u4_round_factor
// x6 :pu1_nnz
// values returned : none
//
// register usage :

View file

@ -115,16 +115,16 @@
// x0 => puc_src1
// x1 => puc_src2
// x2 => puc_dst
// x3 => src_strd1
// [sp] => src_strd2 (x4)
// [sp+4] => dst_strd (x5)
// [sp+8] => log_WD (x6)
// [sp+12] => wt1 (x7)
// [sp+16] => wt2 (x8)
// [sp+20] => ofst1 (x9)
// [sp+24] => ofst2 (x10)
// [sp+28] => ht (x11)
// [sp+32] => wd (x12)
// w3 => src_strd1
// w4 => src_strd2
// w5 => dst_strd
// w6 => log_WD
// w7 => wt1
// [sp] => wt2 (w8)
// [sp+8] => ofst1 (w9)
// [sp+16] => ofst2 (w10)
// [sp+24] => ht (w11)
// [sp+32] => wd (w12)
//
.text
.p2align 2
@ -138,21 +138,24 @@ ih264_weighted_bi_pred_luma_av8:
// STMFD sp!, {x4-x12,x14} //stack stores the values of the arguments
push_v_regs
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
stp x19, x20, [sp, #-16]!
ldr x8, [sp, #80] //Load wt2 in x8
ldr x9, [sp, #88] //Load ofst1 in x9
add x6, x6, #1 //x6 = log_WD + 1
sub x20, x6, #0 //x13 = -(log_WD + 1)
neg x10, x20
ldr w8, [sp, #80] //Load wt2 in w8
ldr w9, [sp, #88] //Load ofst1 in w9
add w6, w6, #1 //w6 = log_WD + 1
sub w20, w6, #0 //w10 = -(log_WD + 1)
neg w10, w20
dup v0.8h, w10 //Q0 = -(log_WD + 1) (32-bit)
ldr x10, [sp, #96] //Load ofst2 in x10
ldr x11, [sp, #104] //Load ht in x11
ldr x12, [sp, #112] //Load wd in x12
add x9, x9, #1 //x9 = ofst1 + 1
add x9, x9, x10 //x9 = ofst1 + ofst2 + 1
ldr w10, [sp, #96] //Load ofst2 in w10
ldr w11, [sp, #104] //Load ht in w11
ldr w12, [sp, #112] //Load wd in w12
add w9, w9, #1 //w9 = ofst1 + 1
add w9, w9, w10 //w9 = ofst1 + ofst2 + 1
mov v2.s[0], w7
mov v2.s[1], w8 //D2 = {wt1(32-bit), wt2(32-bit)}
asr x9, x9, #1 //x9 = ofst = (ofst1 + ofst2 + 1) >> 1
asr w9, w9, #1 //w9 = ofst = (ofst1 + ofst2 + 1) >> 1
dup v3.8b, w9 //D3 = ofst (8-bit)
cmp w12, #16
beq loop_16 //branch if wd is 16
@ -395,16 +398,16 @@ end_loops:
// x0 => puc_src1
// x1 => puc_src2
// x2 => puc_dst
// x3 => src_strd1
// [sp] => src_strd2 (x4)
// [sp+4] => dst_strd (x5)
// [sp+8] => log_WD (x6)
// [sp+12] => wt1 (x7)
// [sp+16] => wt2 (x8)
// [sp+20] => ofst1 (x9)
// [sp+24] => ofst2 (x10)
// [sp+28] => ht (x11)
// [sp+32] => wd (x12)
// w3 => src_strd1
// w4 => src_strd2
// w5 => dst_strd
// w6 => log_WD
// w7 => wt1
// [sp] => wt2 (w8)
// [sp+8] => ofst1 (w9)
// [sp+16] => ofst2 (w10)
// [sp+24] => ht (w11)
// [sp+32] => wd (w12)
//
@ -417,24 +420,23 @@ ih264_weighted_bi_pred_chroma_av8:
// STMFD sp!, {x4-x12,x14} //stack stores the values of the arguments
push_v_regs
sxtw x3, w3
sxtw x4, w4
sxtw x5, w5
stp x19, x20, [sp, #-16]!
ldr x8, [sp, #80] //Load wt2 in x8
ldr w8, [sp, #80] //Load wt2 in w8
dup v4.4s, w8 //Q2 = (wt2_u, wt2_v) (32-bit)
dup v2.4s, w7 //Q1 = (wt1_u, wt1_v) (32-bit)
add x6, x6, #1 //x6 = log_WD + 1
ldr w9, [sp, #88] //Load ofst1 in x9
sxtw x9, w9
ldr w10, [sp, #96] //Load ofst2 in x10
sxtw x10, w10
sub x20, x6, #0 //x12 = -(log_WD + 1)
neg x20, x20
add w6, w6, #1 //w6 = log_WD + 1
ldr w9, [sp, #88] //Load ofst1 in w9
ldr w10, [sp, #96] //Load ofst2 in w10
sub w20, w6, #0 //w20 = -(log_WD + 1)
neg w20, w20
dup v0.8h, w20 //Q0 = -(log_WD + 1) (16-bit)
ldr w11, [sp, #104] //Load ht in x11
ldr w12, [sp, #112] //Load wd in x12
sxtw x11, w11
sxtw x12, w12
dup v20.8h, w9 //0ffset1
dup v21.8h, w10 //0ffset2
srhadd v6.8b, v20.8b, v21.8b

View file

@ -98,13 +98,13 @@
//**************Variables Vs Registers*****************************************
// x0 => puc_src
// x1 => puc_dst
// x2 => src_strd
// x3 => dst_strd
// [sp] => log_WD (x4)
// [sp+4] => wt (x5)
// [sp+8] => ofst (x6)
// [sp+12] => ht (x7)
// [sp+16] => wd (x8)
// w2 => src_strd
// w3 => dst_strd
// w4 => log_WD
// w5 => wt
// w6 => ofst
// w7 => ht
// [sp] => wd (w8)
//
.text
.p2align 2
@ -118,13 +118,15 @@ ih264_weighted_pred_luma_av8:
// STMFD sp!, {x4-x9,x14} //stack stores the values of the arguments
push_v_regs
sxtw x2, w2
sxtw x3, w3
stp x19, x20, [sp, #-16]!
ldr w8, [sp, #80] //Load wd
sxtw x8, w8
dup v2.4h, w5 //D2 = wt (16-bit)
sub x20, x4, #0 //x9 = -log_WD
neg x9, x20
sub w20, w4, #0 //w9 = -log_WD
neg w9, w20
dup v3.8b, w6 //D3 = ofst (8-bit)
cmp w8, #16 //check if wd is 16
dup v0.8h, w9 //Q0 = -log_WD (16-bit)
@ -327,13 +329,13 @@ end_loops:
//**************Variables Vs Registers*****************************************
// x0 => puc_src
// x1 => puc_dst
// x2 => src_strd
// x3 => dst_strd
// [sp] => log_WD (x4)
// [sp+4] => wt (x5)
// [sp+8] => ofst (x6)
// [sp+12] => ht (x7)
// [sp+16] => wd (x8)
// w2 => src_strd
// w3 => dst_strd
// w4 => log_WD
// w5 => wt
// w6 => ofst
// w7 => ht
// [sp] => wd (w8)
//
@ -345,13 +347,15 @@ ih264_weighted_pred_chroma_av8:
// STMFD sp!, {x4-x9,x14} //stack stores the values of the arguments
push_v_regs
sxtw x2, w2
sxtw x3, w3
stp x19, x20, [sp, #-16]!
ldr w8, [sp, #80] //Load wd
sxtw x8, w8
sub x20, x4, #0 //x9 = -log_WD
neg x9, x20
sub w20, w4, #0 //w9 = -log_WD
neg w9, w20
dup v2.4s, w5 //Q1 = {wt_u (16-bit), wt_v (16-bit)}

View file

@ -82,9 +82,9 @@ ih264e_evaluate_intra16x16_modes_av8:
//x0 = pu1_src,
//x1 = pu1_ngbr_pels_i16,
//x2 = pu1_dst,
//x3 = src_strd,
//x4 = dst_strd,
//x5 = u4_n_avblty,
//w3 = src_strd,
//w4 = dst_strd,
//w5 = u4_n_avblty,
//x6 = u4_intra_mode,
//x7 = pu4_sadmin
@ -92,9 +92,11 @@ ih264e_evaluate_intra16x16_modes_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
sxtw x3, w3
sxtw x4, w4
stp x19, x20, [sp, #-16]!
ldr x16, [sp, #80]
ldr w16, [sp, #80]
mov x17, x4
mov x14, x6
mov x15, x7
@ -105,13 +107,13 @@ ih264e_evaluate_intra16x16_modes_av8:
mov w10, #0
mov w11 , #3
ands x6, x5, #0x01
ands w6, w5, #0x01
beq top_available //LEFT NOT AVAILABLE
ld1 {v0.16b}, [x1]
add w10, w10, #8
add w11, w11, #1
top_available:
ands x6, x5, #0x04
ands w6, w5, #0x04
beq none_available
add x6, x1, #17
ld1 {v1.16b}, [x6]
@ -119,7 +121,7 @@ top_available:
add w11, w11, #1
b summation
none_available:
cmp x5, #0
cmp w5, #0
bne summation
mov w6, #128
dup v30.16b, w6
@ -469,16 +471,16 @@ sad_comp:
mov x11, #1
lsl x11, x11, #30
mov x0, x16
mov w0, w16
//--------------------------------------------
ands x7, x0, #01 // vert mode valid????????????
ands w7, w0, #01 // vert mode valid????????????
csel x8, x11, x8, eq
ands x6, x0, #02 // horz mode valid????????????
ands w6, w0, #02 // horz mode valid????????????
csel x9, x11, x9, eq
ands x6, x0, #04 // dc mode valid????????????
ands w6, w0, #04 // dc mode valid????????????
csel x10, x11, x10, eq

View file

@ -82,9 +82,9 @@ ih264e_evaluate_intra_chroma_modes_av8:
//x0 = pu1_src,
//x1 = pu1_ngbr_pels_i16,
//x2 = pu1_dst,
//x3 = src_strd,
//x4 = dst_strd,
//x5 = u4_n_avblty,
//w3 = src_strd,
//w4 = dst_strd,
//w5 = u4_n_avblty,
//x6 = u4_intra_mode,
//x7 = pu4_sadmin
@ -92,20 +92,22 @@ ih264e_evaluate_intra_chroma_modes_av8:
// STMFD sp!, {x4-x12, x14} //store register values to stack
push_v_regs
sxtw x3, w3
sxtw x4, w4
stp x19, x20, [sp, #-16]!
//-----------------------
ldr x16, [sp, #80]
ldr w16, [sp, #80]
mov x17, x4
mov x18, x5
mov w18, w5
mov x14, x6
mov x15, x7
mov x19, #5
ands x6, x5, x19
mov w19, #5
ands w6, w5, w19
beq none_available
cmp x6, #1
cmp w6, #1
beq left_only_available
cmp x6, #4
cmp w6, #4
beq top_only_available
all_available:
@ -368,20 +370,20 @@ sad_comp:
mov x11, #1
//-----------------------
mov x0, x16 // u4_valid_intra_modes
mov w0, w16 // u4_valid_intra_modes
//--------------------------------------------
lsl x11, x11, #30
ands x7, x0, #04 // vert mode valid????????????
ands w7, w0, #04 // vert mode valid????????????
csel x8, x11, x8, eq
ands x6, x0, #02 // horz mode valid????????????
ands w6, w0, #02 // horz mode valid????????????
csel x9, x11, x9, eq
ands x6, x0, #01 // dc mode valid????????????
ands w6, w0, #01 // dc mode valid????????????
csel x10, x11, x10, eq

View file

@ -86,6 +86,8 @@
ih264e_sixtapfilter_horz_av8:
// STMFD sp!,{x14}
push_v_regs
sxtw x2, w2
sxtw x3, w3
stp x19, x20, [sp, #-16]!
movi v0.8b, #5
@ -263,6 +265,8 @@ filter_horz_loop:
ih264e_sixtap_filter_2dvh_vert_av8:
// STMFD sp!,{x10,x11,x12,x14}
push_v_regs
sxtw x3, w3
sxtw x4, w4
stp x19, x20, [sp, #-16]!
////x0 - pu1_ref

View file

@ -95,6 +95,8 @@
.global ime_compute_sad_16x16_fast_av8
ime_compute_sad_16x16_fast_av8:
push_v_regs
sxtw x2, w2
sxtw x3, w3
lsl x2, x2, #1
lsl x3, x3, #1
@ -179,6 +181,8 @@ ime_compute_sad_16x8_av8:
//chheck what stride incremtn to use
//earlier code did not have this lsl
push_v_regs
sxtw x2, w2
sxtw x3, w3
mov x6, #2
movi v30.8h, #0
@ -255,6 +259,8 @@ core_loop_ime_compute_sad_16x8_av8:
ime_compute_sad_16x16_ea8_av8:
push_v_regs
sxtw x2, w2
sxtw x3, w3
movi v30.8h, #0
add x7, x0, x2
@ -381,9 +387,12 @@ ime_calculate_sad2_prog_av8:
// x0 = ref1 <UWORD8 *>
// x1 = ref2 <UWORD8 *>
// x2 = src <UWORD8 *>
// x3 = RefBufferWidth <UWORD32>
// stack = CurBufferWidth <UWORD32>, psad <UWORD32 *>
// w3 = RefBufferWidth <UWORD32>
// w4 = CurBufferWidth <UWORD32>
// x5 = psad <UWORD32 *>
push_v_regs
sxtw x3, w3
sxtw x4, w4
mov x6, #8
movi v30.8h, #0
movi v31.8h, #0
@ -459,10 +468,14 @@ ime_calculate_sad3_prog_av8:
// x1 = ref2 <UWORD8 *>
// x2 = ref3 <UWORD8 *>
// x3 = src <UWORD8 *>
// stack = RefBufferWidth <UWORD32>, CurBufferWidth <UWORD32>, psad <UWORD32 *>
// w4 = RefBufferWidth <UWORD32>
// w5 = CurBufferWidth <UWORD32>
// x6 = psad <UWORD32 *>
push_v_regs
sxtw x4, w4
sxtw x5, w5
mov x6, #16
movi v29.8h, #0
movi v30.8h, #0
@ -539,6 +552,8 @@ core_loop_ime_calculate_sad3_prog_av8:
.global ime_sub_pel_compute_sad_16x16_av8
ime_sub_pel_compute_sad_16x16_av8:
push_v_regs
sxtw x4, w4
sxtw x5, w5
sub x7, x1, #1 //x left
sub x8, x2, x5 //y top
sub x9, x3, #1 //xy left
@ -642,6 +657,8 @@ core_loop_ime_sub_pel_compute_sad_16x16_av8:
.global ime_compute_sad_16x16_av8
ime_compute_sad_16x16_av8:
push_v_regs
sxtw x2, w2
sxtw x3, w3
mov x6, #4
movi v30.8h, #0
@ -697,6 +714,8 @@ core_loop_ime_compute_sad_16x16_av8:
.global ime_calculate_sad4_prog_av8
ime_calculate_sad4_prog_av8:
push_v_regs
sxtw x2, w2
sxtw x3, w3
sub x5, x0, #1 //left
add x6, x0, #1 //right
sub x7, x0, x2 //top
@ -772,13 +791,15 @@ core_loop_ime_calculate_sad4_prog_av8:
ime_compute_satqd_16x16_lumainter_av8:
//x0 :pointer to src buffer
//x1 :pointer to est buffer
//x2 :Source stride
//x3 :Pred stride
//w2 :Source stride
//w3 :Pred stride
//x4 :Threshold pointer
//x5 :Distortion,ie SAD
//x6 :is nonzero
//x7 :loop counter
push_v_regs
sxtw x2, w2
sxtw x3, w3
stp d8, d9, [sp, #-16]!
stp d10, d11, [sp, #-16]!
stp d12, d13, [sp, #-16]!