Rémi Denis-Courmont c5f69719bc lavu/bswap: remove some inline assembler ... C code or compiler built-ins are preferable over inline assembler for byte-swaps as it allows for better optimisations (e.g. instruction scheduling) which would otherwise be impossible. As with f64c2e710f for x86 and Arm, this removes the inline assembler on GCC (and Clang) since we now require recent enough compiler versions. This indeed seems to work on AArch64, SuperH and, if Zbb is enabled, RISC-V. (AVR32 was not tested since it has no known working compilers at this time.)		2024-06-13 21:16:16 +03:00
..
asm.S	aarch64: Only enable extensions in the intended files/regions	2023-10-24 14:46:20 +03:00
cpu.c	aarch64: Factorize code for CPU feature detection on Apple platforms	2024-04-10 10:39:08 +03:00
cpu.h	aarch64: Add cpu flags for the dotprod and i8mm extensions	2023-06-06 12:40:42 +03:00
float_dsp_init.c
float_dsp_neon.S	aarch64: Consistently use lowercase for vector element specifiers	2023-10-21 23:25:18 +03:00
Makefile	lavu/tx: implement aarch64 NEON SIMD FFT	2022-08-25 17:40:28 +02:00
neontest.h
timer.h	avutil/aarch64: Skip define AV_READ_TIME for apple	2024-06-11 01:10:42 +08:00
tx_float_init.c	lavu/tx: refactor to explicitly track and convert lookup table order	2022-11-24 15:58:34 +01:00
tx_float_neon.S	aarch64: Manually tweak vertical alignment/indentation in tx_float_neon.S	2023-10-21 23:25:39 +03:00