Compare commits
4 commits
| Author | SHA1 | Date | |
|---|---|---|---|
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e721e319f1 | ||
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dd2a7f6421 | ||
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74dbf49fee | ||
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555edb9337 |
11 changed files with 34 additions and 306 deletions
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@ -38,7 +38,7 @@
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<PlatformToolset>v143</PlatformToolset>
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</PropertyGroup>
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<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
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<PlatformToolset>v143</PlatformToolset>
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||||
<PlatformToolset>v140</PlatformToolset>
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||||
</PropertyGroup>
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||||
<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
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<PlatformToolset>v143</PlatformToolset>
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@ -285,24 +285,6 @@ void CPU_VT369_Sound::RunCycle (void) {
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}
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void CPU_VT369_Sound::Reset (void) {
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MemGet(PC);
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MemGet(PC);
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MemGet(0x100 | SP--);
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MemGet(0x100 | SP--);
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MemGet(0x100 | SP--);
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FI = 1;
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dataBank =0;
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PCL = MemGet(0x1FFC);
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PCH = MemGet(0x1FFD);
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WantTimerIRQ =WantIRQ =WantNMI =0;
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EnableDMA =FALSE;
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vt369TimerPeriod =0;
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vt369TimerControl =0;
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CycleCount =0;
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updatePrescaler();
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}
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void CPU_VT369_Sound::ResetSoft (void) {
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MemGet(PC);
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MemGet(PC);
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MemGet(0x100 | SP--);
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@ -536,7 +518,7 @@ void APU_VT369::IntWrite (int bank, int addr, int val) {
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}
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break;
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case 0x162:
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if (val == 0x0D && !Settings::VT369SoundHLE) dynamic_cast<CPU::CPU_VT369_Sound*>(CPU::CPU[1])->ResetSoft();
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if (val ==0x0D && !Settings::VT369SoundHLE) CPU::CPU[1]->Reset();
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break;
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case 0x169:
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if (RI.INES2_SubMapper ==13 || RI.INES2_SubMapper ==15)
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@ -595,11 +577,6 @@ void APU_VT369::Reset (void) {
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vt369TimerPeriod =0;
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vt369TimerControl =0;
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vt369LastPeriod =0;
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reg4100[0x1C] = 0;
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reg4100[0x1F] = 0;
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reg4100[0x62] = 0;
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updatePrescaler();
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// Default DMA values, to allow NES games to run in VT369 5.37 MHz mode
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vt369DMARequest.transferLength =256;
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@ -834,15 +811,6 @@ void APU_VT369::Run (void) {
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namespace PPU {
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void PPU_VT369::Reset (void) {
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PPU_OneBus::Reset();
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reg2000[0x1C] = 0;
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reg2000[0x1D] = 0;
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reg2000[0x1E] = 0;
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reg2000[0x50] = 0;
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for (int i = 0; i < 0xa; i++)
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reg2000[0x40 + i] = 0;
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GetGFXPtr();
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}
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@ -1086,7 +1054,6 @@ void PPU_VT369::Run (void) {
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}
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}
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#define IS36PC_HACK (reg2000[0x50] & 1)
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void PPU_VT369::RunNoSkipEnhanced (int NumTicks) {
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register unsigned char TC;
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register unsigned char *CurTileData;
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@ -1149,7 +1116,7 @@ void PPU_VT369::RunNoSkipEnhanced (int NumTicks) {
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case 192: case 200: case 208: case 216: case 224: case 232: case 240: case 248:
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case 320: case 328:
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if (reg4100[0x06] &2) VRAMAddr &=~0xC00; // Idiosyncratic implementation of one-screen mirroring.
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RenderAddr =0x2000 | ((VRAMAddr &0xFFF) << (IS36PC_HACK ? 1 : 0)); // Fetch name table byte;
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RenderAddr =0x2000 | VRAMAddr &0xFFF; // Fetch name table byte
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RenderData[0] =CHRPointer[RenderAddr >>10][RenderAddr &0x3FF];
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break;
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case 1: case 9: case 17: case 25: case 33: case 41: case 49: case 57:
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@ -1164,14 +1131,8 @@ void PPU_VT369::RunNoSkipEnhanced (int NumTicks) {
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case 130: case 138: case 146: case 154: case 162: case 170: case 178: case 186:
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case 194: case 202: case 210: case 218: case 226: case 234: case 242: case 250:
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case 322: case 330:
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if (IS36PC_HACK) {
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RenderAddr =0x2001 | ((VRAMAddr &0xFFF) << 1); // Fetch name table byte;
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RenderData[1] =CHRPointer[RenderAddr >>10][RenderAddr &0x3FF];
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}
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else {
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RenderAddr =0x23C0 | VRAMAddr &0xC00 | VRAMAddr >>4 &0x38 | VRAMAddr >>2 &0x07; // Fetch attribute table byte
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RenderData[1] =CHRPointer[RenderAddr >>10][RenderAddr &0x3FF] >>(VRAMAddr >>4 &4 | VRAMAddr &2) &3;
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}
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RenderAddr =0x23C0 | VRAMAddr &0xC00 | VRAMAddr >>4 &0x38 | VRAMAddr >>2 &0x07; // Fetch attribute table byte
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RenderData[1] =CHRPointer[RenderAddr >>10][RenderAddr &0x3FF] >>(VRAMAddr >>4 &4 | VRAMAddr &2) &3;
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break;
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case 3: case 11: case 19: case 27: case 35: case 43: case 51: case 59:
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case 67: case 75: case 83: case 91: case 99: case 107: case 115: case 123:
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@ -1849,7 +1810,6 @@ int PPU_VT369::Save (FILE *out) {
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writeByte(reg2000[0x1D]);
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writeByte(reg2000[0x1E]);
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writeByte(reg4100[0x06]);
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writeByte(reg2000[0x50]);
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return clen;
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}
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@ -1862,7 +1822,6 @@ int PPU_VT369::Load (FILE *in, int version_id) {
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readByte(reg2000[0x1D]);
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readByte(reg2000[0x1E]);
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readByte(reg4100[0x06]);
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readByte(reg2000[0x50]);
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return clen;
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}
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@ -43,7 +43,6 @@ public:
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void ExecOp (void) override;
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void RunCycle (void) override;
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void Reset (void) override;
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void ResetSoft (void);
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int readReg (int);
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void writeReg (int, int);
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void DoTimerIRQ (void);
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@ -35,10 +35,10 @@
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<CharacterSet>Unicode</CharacterSet>
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</PropertyGroup>
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<PropertyGroup Condition="'$(Platform)'=='x64'" Label="Configuration">
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<PlatformToolset>v143</PlatformToolset>
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<PlatformToolset>Windows7.1SDK</PlatformToolset>
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</PropertyGroup>
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<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
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<PlatformToolset>v143</PlatformToolset>
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<PlatformToolset>v140</PlatformToolset>
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</PropertyGroup>
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<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
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<PlatformToolset>v143</PlatformToolset>
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@ -35,10 +35,10 @@
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<CharacterSet>Unicode</CharacterSet>
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</PropertyGroup>
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<PropertyGroup Condition="'$(Platform)'=='x64'" Label="Configuration">
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<PlatformToolset>v143</PlatformToolset>
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<PlatformToolset>Windows7.1SDK</PlatformToolset>
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</PropertyGroup>
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<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
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||||
<PlatformToolset>v143</PlatformToolset>
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<PlatformToolset>v140</PlatformToolset>
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</PropertyGroup>
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<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
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<PlatformToolset>v143</PlatformToolset>
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@ -92,9 +92,6 @@
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<EnableCOMDATFolding Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">true</EnableCOMDATFolding>
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<LinkTimeCodeGeneration Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">UseLinkTimeCodeGeneration</LinkTimeCodeGeneration>
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</Link>
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<Link>
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<AdditionalDependencies Condition="'$(Configuration)|$(Platform)'=='Release|x64'">kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;odbc32.lib;odbccp32.lib;winmm.lib;%(AdditionalDependencies)</AdditionalDependencies>
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</Link>
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</ItemDefinitionGroup>
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<ItemGroup>
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<ClCompile Include="..\src\Hardware\Hash.cpp" />
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@ -35,10 +35,10 @@
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<CharacterSet>Unicode</CharacterSet>
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</PropertyGroup>
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<PropertyGroup Condition="'$(Platform)'=='x64'" Label="Configuration">
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<PlatformToolset>v143</PlatformToolset>
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<PlatformToolset>Windows7.1SDK</PlatformToolset>
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||||
</PropertyGroup>
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||||
<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
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||||
<PlatformToolset>v143</PlatformToolset>
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||||
<PlatformToolset>v140</PlatformToolset>
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||||
</PropertyGroup>
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||||
<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
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||||
<PlatformToolset>v143</PlatformToolset>
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||||
|
|
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@ -35,10 +35,10 @@
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<CharacterSet>Unicode</CharacterSet>
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</PropertyGroup>
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<PropertyGroup Condition="'$(Platform)'=='x64'" Label="Configuration">
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||||
<PlatformToolset>v143</PlatformToolset>
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||||
<PlatformToolset>Windows7.1SDK</PlatformToolset>
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||||
</PropertyGroup>
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||||
<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
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||||
<PlatformToolset>v143</PlatformToolset>
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||||
<PlatformToolset>v140</PlatformToolset>
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||||
</PropertyGroup>
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||||
<PropertyGroup Label="Configuration" Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
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<PlatformToolset>v143</PlatformToolset>
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@ -178,50 +178,8 @@ void syncCHR (int AND, int OR) {
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void syncMirror () {
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switch (HV) {
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case 0:
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if ((reg2000[0x50] & 1) && (reg2000[0x1E] & 0x08) && ROM->ConsoleType == CONSOLE_VT369) {
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// 0x2000-0x27ff
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EMU->SetCHR_NT1(0x8, 0);
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EMU->SetCHR_NT1(0x9, 1);
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// 0x2800-0x2fff
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EMU->SetCHR_NT1(0xA, 2);
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EMU->SetCHR_NT1(0xB, 3);
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// 0x3000-0x37ff
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EMU->SetCHR_NT1(0xC, 0);
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EMU->SetCHR_NT1(0xD, 1);
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// 0x3800-0x38ff
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EMU->SetCHR_NT1(0xE, 2);
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EMU->SetCHR_NT1(0xF, 3);
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}
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else {
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EMU->Mirror_V();
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}
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break;
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case 1:
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if ((reg2000[0x50] & 1) && (reg2000[0x1E] & 0x08) && ROM->ConsoleType == CONSOLE_VT369) {
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// 0x2000-0x27ff
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EMU->SetCHR_NT1(0x8, 0);
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EMU->SetCHR_NT1(0x9, 1);
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// 0x2800-0x2fff
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EMU->SetCHR_NT1(0xA, 0);
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EMU->SetCHR_NT1(0xB, 1);
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// 0x3000-0x37ff
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EMU->SetCHR_NT1(0xC, 2);
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EMU->SetCHR_NT1(0xD, 3);
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// 0x3800-0x38ff
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EMU->SetCHR_NT1(0xE, 2);
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EMU->SetCHR_NT1(0xF, 3);
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}
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else {
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EMU->Mirror_H();
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}
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break;
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case 0: EMU->Mirror_V(); break;
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case 1: EMU->Mirror_H(); break;
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}
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}
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@ -33,9 +33,7 @@ void sync (void) {
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| (reg[1] &0x08? 0x80: 0x00)
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| (reg[1] &0x04? 0x100: 0x00)
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| (reg[1] &0x02? 0x200: 0x00)
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|((reg[0] &0x30) <<6)
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|((~reg[1] &0x01) <<12)
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;
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|((reg[0] &0x30) <<6);
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break;
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case 4: /* Different arrangement of register 1, PRG A20-A21 in register 0 */
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prgMaskGNROM = (reg[3] &0x10? (reg[1] &0x02? 0x03: 0x01): 0x00);
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@ -119,8 +119,7 @@ void sync () {
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break;
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default: // Standard VT4FFx platform
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OR = ((OneBus::reg4100[0x39] & 0x02) ? 0x0800 : 0x0000) |
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((OneBus::reg4100[0x39] & 0x01) ? 0x1000 : 0x0000); // Custom PCB design
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OR = ((OneBus::reg4100[0x39] & 0x02) ? 0x0800 : 0x0000);
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break;
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}
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@ -5,85 +5,28 @@ namespace {
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class SerialROM: public SerialDevice {
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int bitPosition;
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uint8_t command;
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uint8_t curState;
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uint8_t lateResponse;
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const uint8_t* rom;
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const uint8_t* lateResponseData;
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public:
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SerialROM(const uint8_t* _rom, const uint8_t* _lateResponse) :
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SerialROM(const uint8_t* _rom):
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bitPosition(0),
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command(0),
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lateResponse(0),
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curState(0),
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rom(_rom),
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lateResponseData(_lateResponse) {
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rom(_rom) {
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}
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void setPins(bool select, bool newClock, bool newData) {
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// EMU->DbgOut(L"Select: %02d, Clock: %02d, Data: %02d", select, newClock, newData);
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if (select) {
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state = 0;
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curState = 0;
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} else if (!select && curState == 0) {
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curState = 1;
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}
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if (select)
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state =0;
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else
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if (!clock && newClock) {
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switch (curState) {
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case 1:
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command = (command << 1) | (newData * 1);
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if (state == 7)
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EMU->DbgOut(L"Command: %02X", command);
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if (++state == 8) {
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switch (command) {
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case 0x30:
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bitPosition = 0;
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curState = 2;
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break;
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case 0x10:
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if (lateResponseData != NULL) {
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state = 0;
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curState = 3;
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command = 0;
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break;
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}
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default:
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state = 0;
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curState = 255;
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}
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}
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break;
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case 2:
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output = rom[bitPosition >> 3] >> (7 - (bitPosition & 7)) & 1 ? true : false;
|
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if (++bitPosition >= (256 * 8)) {
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state = 0;
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curState = 1;
|
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}
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break;
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case 3:
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command = (command << 1) | (newData * 1);
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if (state == 7)
|
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EMU->DbgOut(L"Late Response Command: %02X", command);
|
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|
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if (++state == 8) {
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bitPosition = 0;
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curState = 4;
|
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lateResponse = lateResponseData[command];
|
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}
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break;
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|
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case 4:
|
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output = lateResponse >> (7 - (bitPosition & 7)) & 1 ? true : false;
|
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if (++bitPosition >= 8) {
|
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state = 0;
|
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curState = 255;
|
||||
}
|
||||
break;
|
||||
if (state <8) {
|
||||
command =command <<1 | newData*1;
|
||||
if (state == 7) EMU->DbgOut(L"Command: %02X", command);
|
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if (++state ==8 && command !=0x30)
|
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state =0;
|
||||
else
|
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bitPosition =0;
|
||||
} else {
|
||||
output =rom[bitPosition >>3] >>(7 -(bitPosition &7)) &1? true: false;
|
||||
if (++bitPosition >=256 *8) state =0;
|
||||
}
|
||||
}
|
||||
clock =newClock;
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||||
|
|
@ -91,42 +34,6 @@ public:
|
|||
};
|
||||
|
||||
SerialROM* serialROM =NULL;
|
||||
uint8_t latch_4144[4];
|
||||
uint8_t latch_414c[4];
|
||||
uint8_t latch_41e4[4];
|
||||
uint8_t latch_41eb;
|
||||
int lcd_id_offset;
|
||||
int lcd_id_len;
|
||||
uint8_t pcase_resp[16];
|
||||
uint8_t pcase_write_hist[2];
|
||||
|
||||
uint8_t vt3xx_36pcase_gpio_bus_latch()
|
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{
|
||||
return (latch_414c[0x3] & 0x1f) | ((latch_41e4[0x03] & 0x1c) << 3);
|
||||
}
|
||||
|
||||
uint8_t vt3xx_36pcase_gpio_bus_r()
|
||||
{
|
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if (lcd_id_offset < lcd_id_len)
|
||||
return pcase_resp[lcd_id_offset];
|
||||
|
||||
return vt3xx_36pcase_gpio_bus_latch();
|
||||
}
|
||||
|
||||
void vt3xx_36pcase_gpio_bus_w()
|
||||
{
|
||||
pcase_write_hist[0] = pcase_write_hist[1];
|
||||
pcase_write_hist[1] = vt3xx_36pcase_gpio_bus_latch();
|
||||
|
||||
if ((pcase_write_hist[0] == 0x00) && (pcase_write_hist[1] == 0x00))
|
||||
{
|
||||
// The menu waits for this two-byte response before applying the LCD/GPIO table at f7d6.
|
||||
pcase_resp[0] = 0x93;
|
||||
pcase_resp[1] = 0x35;
|
||||
lcd_id_offset = 0;
|
||||
lcd_id_len = 2;
|
||||
}
|
||||
}
|
||||
|
||||
void sync () {
|
||||
OneBus::syncPRG(0x0FFF, 0);
|
||||
|
|
@ -137,110 +44,21 @@ void sync () {
|
|||
BOOL MAPINT load (void) {
|
||||
iNES_SetSRAM();
|
||||
OneBus::load(sync);
|
||||
if (ROM->INES2_SubMapper == 3 && (ROM->MiscROMSize & 0x0200)) {
|
||||
serialROM = new SerialROM(ROM->MiscROMData + ROM->MiscROMSize - 0x0200, ROM->MiscROMData + ROM->MiscROMSize - 0x0100);
|
||||
}
|
||||
else if (ROM->MiscROMSize & 0x0100) {
|
||||
serialROM = new SerialROM(ROM->MiscROMData + ROM->MiscROMSize - 0x0100, NULL);
|
||||
}
|
||||
if (ROM->MiscROMSize &0x0100) serialROM =new SerialROM(ROM->MiscROMData +ROM->MiscROMSize -0x0100);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
int MAPINT read4(int bank, int addr) {
|
||||
if (ROM->INES2_SubMapper == 3) {
|
||||
if (addr >= 0x144 && addr < 0x148) {
|
||||
return latch_4144[addr & 3];
|
||||
}
|
||||
else if (addr >= 0x14c && addr < 0x150) {
|
||||
if (addr == 0x14f) {
|
||||
return (latch_414c[addr & 3] & 0xe0) | (vt3xx_36pcase_gpio_bus_r() & 0x1f);
|
||||
}
|
||||
return latch_414c[addr & 3];
|
||||
}
|
||||
else if (addr >= 0x1e4 && addr < 0x1e8) {
|
||||
if (addr == 0x1e7) {
|
||||
return (latch_41e4[addr & 3] & 0xe3) | ((vt3xx_36pcase_gpio_bus_r() >> 3) & 0x1c);
|
||||
}
|
||||
return latch_41e4[addr & 3];
|
||||
}
|
||||
else if (addr == 0x15c) {
|
||||
return 0x10;
|
||||
}
|
||||
}
|
||||
|
||||
return OneBus::readAPU(bank, addr);
|
||||
}
|
||||
|
||||
int MAPINT read4Debug(int bank, int addr) {
|
||||
if (ROM->INES2_SubMapper == 3) {
|
||||
if (addr >= 0x144 && addr < 0x148) {
|
||||
return latch_4144[addr & 3];
|
||||
}
|
||||
else if (addr >= 0x14c && addr < 0x150) {
|
||||
if (addr == 0x14f) {
|
||||
return (latch_414c[addr & 3] & 0xe0) | (vt3xx_36pcase_gpio_bus_r() & 0x1f);
|
||||
}
|
||||
return latch_414c[addr & 3];
|
||||
}
|
||||
else if (addr >= 0x1e4 && addr < 0x1e8) {
|
||||
if (addr == 0x1e7) {
|
||||
return (latch_41e4[addr & 3] & 0xe3) | ((vt3xx_36pcase_gpio_bus_r() >> 3) & 0x1c);
|
||||
}
|
||||
return latch_41e4[addr & 3];
|
||||
}
|
||||
else if (addr == 0x15c) {
|
||||
return 0x10;
|
||||
}
|
||||
}
|
||||
|
||||
return OneBus::readAPUDebug(bank, addr);
|
||||
}
|
||||
|
||||
void MAPINT write4(int bank, int addr, int val) {
|
||||
if (ROM->INES2_SubMapper == 3) {
|
||||
if (addr >= 0x144 && addr < 0x148) {
|
||||
int old = latch_4144[addr & 3];
|
||||
latch_4144[addr & 3] = val;
|
||||
|
||||
if (addr == 0x147 && !(old & 0x20) && (val & 0x20)) {
|
||||
vt3xx_36pcase_gpio_bus_w();
|
||||
}
|
||||
}
|
||||
else if (addr >= 0x14c && addr < 0x150) {
|
||||
latch_414c[addr & 3] = val;
|
||||
}
|
||||
else if (addr >= 0x1e4 && addr < 0x1e8) {
|
||||
latch_41e4[addr & 3] = val;
|
||||
}
|
||||
else if (addr == 0x1eb) {
|
||||
int old = latch_41eb;
|
||||
latch_41eb = val;
|
||||
|
||||
if (!(old & 0x10) && (val & 0x10)) {
|
||||
if (lcd_id_offset < lcd_id_len)
|
||||
lcd_id_offset++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
OneBus::writeAPU(bank, addr, val);
|
||||
}
|
||||
|
||||
void MAPINT reset (RESET_TYPE resetType) {
|
||||
OneBus::reset(resetType);
|
||||
if (serialROM) {
|
||||
serialROM->reset();
|
||||
switch(ROM->INES2_SubMapper) {
|
||||
case 0: case 3: OneBus::gpio[2].attachSerialDevice({ serialROM, 4, 3, 5 }); break;
|
||||
case 0: OneBus::gpio[2].attachSerialDevice({ serialROM, 4, 3, 5 }); break;
|
||||
case 1: OneBus::gpio[1].attachSerialDevice({ serialROM, 8, 7, 6 }); break;
|
||||
case 2: OneBus::gpio[5].attachSerialDevice({ serialROM, 0, 0, 4 }); break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
EMU->SetCPUReadHandler(0x4, read4);
|
||||
EMU->SetCPUReadHandlerDebug(0x4, read4Debug);
|
||||
EMU->SetCPUWriteHandler(0x4, write4);
|
||||
}
|
||||
|
||||
void MAPINT unload () {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue