dccloader/flash/nand/controller/controller.h
2025-04-23 22:32:55 +07:00

101 lines
No EOL
3.1 KiB
C

#pragma once
#include "dcc/dn_dcc_proto.h"
typedef struct {
uint32_t dev_id;
uint32_t page_size;
uint32_t chip_size;
uint32_t block_size;
uint32_t bits;
} nand_info;
static nand_info flash_ids[] = {
{0x6e, 0x100, 0x100000, 0x1000, 8},
{0x64, 0x100, 0x200000, 0x1000, 8},
{0xe8, 0x100, 0x100000, 0x1000, 8},
{0xec, 0x100, 0x100000, 0x1000, 8},
{0xea, 0x100, 0x200000, 0x1000, 8},
{0x6b, 0x200, 0x400000, 0x2000, 8},
{0xe3, 0x200, 0x400000, 0x2000, 8},
{0xe5, 0x200, 0x400000, 0x2000, 8},
{0xd6, 0x200, 0x800000, 0x2000, 8},
{0xe6, 0x200, 0x800000, 0x2000, 8},
{0x33, 0x200, 0x1000000, 0x4000, 8},
{0x73, 0x200, 0x1000000, 0x4000, 8},
{0x43, 0x200, 0x1000000, 0x4000, 16},
{0x53, 0x200, 0x1000000, 0x4000, 16},
{0x35, 0x200, 0x2000000, 0x4000, 8},
{0x75, 0x200, 0x2000000, 0x4000, 8},
{0x45, 0x200, 0x2000000, 0x4000, 16},
{0x55, 0x200, 0x2000000, 0x4000, 16},
{0x36, 0x200, 0x4000000, 0x4000, 8},
{0x76, 0x200, 0x4000000, 0x4000, 8},
{0x46, 0x200, 0x4000000, 0x4000, 16},
{0x56, 0x200, 0x4000000, 0x4000, 16},
{0x78, 0x200, 0x8000000, 0x4000, 8},
{0x79, 0x200, 0x8000000, 0x4000, 8},
{0x72, 0x200, 0x8000000, 0x4000, 16},
{0x74, 0x200, 0x8000000, 0x4000, 16},
{0x39, 0x200, 0x8000000, 0x4000, 8},
{0x49, 0x200, 0x8000000, 0x4000, 16},
{0x59, 0x200, 0x8000000, 0x4000, 16},
{0x71, 0x200, 0x10000000, 0x4000, 8},
{0xa2, 0x0, 0x4000000, 0x0, 8},
{0xb2, 0x0, 0x4000000, 0x0, 16},
{0xc2, 0x0, 0x4000000, 0x0, 16},
{0xf2, 0x0, 0x4000000, 0x0, 8},
{0xa1, 0x0, 0x8000000, 0x0, 8},
{0xb1, 0x0, 0x8000000, 0x0, 16},
{0xc1, 0x0, 0x8000000, 0x0, 16},
{0xf1, 0x0, 0x8000000, 0x0, 8},
{0xaa, 0x0, 0x10000000, 0x0, 8},
{0xba, 0x0, 0x10000000, 0x0, 16},
{0xca, 0x0, 0x10000000, 0x0, 16},
{0xda, 0x0, 0x10000000, 0x0, 8},
{0xac, 0x0, 0x20000000, 0x0, 8},
{0xbc, 0x0, 0x20000000, 0x0, 16},
{0xcc, 0x0, 0x20000000, 0x0, 16},
{0xdc, 0x0, 0x20000000, 0x0, 8},
{0xa3, 0x0, 0x40000000, 0x0, 8},
{0xb3, 0x0, 0x40000000, 0x0, 16},
{0xc3, 0x0, 0x40000000, 0x0, 16},
{0xd3, 0x0, 0x40000000, 0x0, 8},
{0xa5, 0x0, 0x80000000, 0x0, 8},
{0xb5, 0x0, 0x80000000, 0x0, 16},
{0xc5, 0x0, 0x80000000, 0x0, 16},
{0xd5, 0x0, 0x80000000, 0x0, 8},
{0, 0, 0, 0, 0}
};
typedef enum {
NAND_STATUS_FAIL = 0x01,
NAND_STATUS_FAIL_N1 = 0x02,
NAND_STATUS_TRUE_READY = 0x20,
NAND_STATUS_READY = 0x40,
NAND_STATUS_WP = 0x80,
} NANDStatus;
typedef enum {
/* Standard NAND flash commands */
NAND_CMD_READ0 = 0x0,
NAND_CMD_READ1 = 0x1,
NAND_CMD_RNDOUT = 0x5,
NAND_CMD_PAGEPROG = 0x10,
NAND_CMD_READOOB = 0x50,
NAND_CMD_ERASE1 = 0x60,
NAND_CMD_STATUS = 0x70,
NAND_CMD_STATUS_MULTI = 0x71,
NAND_CMD_SEQIN = 0x80,
NAND_CMD_RNDIN = 0x85,
NAND_CMD_READID = 0x90,
NAND_CMD_ERASE2 = 0xd0,
NAND_CMD_RESET = 0xff,
/* Extended commands for large page devices */
NAND_CMD_READSTART = 0x30,
NAND_CMD_RNDOUTSTART = 0xE0,
NAND_CMD_CACHEDPROG = 0x15,
} NANDCommands;
DCC_RETURN NAND_Ctrl_Probe(DCCMemory *mem);
DCC_RETURN NAND_Ctrl_Read(DCCMemory *mem, uint8_t *page_buf, uint8_t *spare_buf, uint32_t page);