diff --git a/flash/nand/controller/default.c b/flash/nand/controller/default.c index 95d67e2..499ba10 100644 --- a/flash/nand/controller/default.c +++ b/flash/nand/controller/default.c @@ -127,7 +127,7 @@ DCC_RETURN NAND_Ctrl_Read(DCCMemory *mem, uint8_t *page_buf, uint8_t *spare_buf, NAND_Ctrl_Wait_Ready(); if (!NAND_Ctrl_Check_Status()) return DCC_READ_ERROR; - for (int i = 0; i < (0x10 / (mem->bit_width / 8)); i++) { + for (int i = 0; i < (0x10 >> (mem->bit_width >> 4)); i++) { wdog_reset(); if (mem->bit_width == 16) { ((uint16_t *)(spare_buf))[i] = NAND_Ctrl_Data_Read(); @@ -147,7 +147,7 @@ DCC_RETURN NAND_Ctrl_Read(DCCMemory *mem, uint8_t *page_buf, uint8_t *spare_buf, NAND_Ctrl_Wait_Ready(); if (!NAND_Ctrl_Check_Status()) return DCC_READ_ERROR; - for (int i = 0; i < (mem->page_size / (mem->bit_width / 8)); i++) { + for (int i = 0; i < (mem->page_size >> (mem->bit_width >> 4)); i++) { wdog_reset(); if (mem->bit_width == 16) { ((uint16_t *)(page_buf))[i] = NAND_Ctrl_Data_Read(); @@ -156,7 +156,7 @@ DCC_RETURN NAND_Ctrl_Read(DCCMemory *mem, uint8_t *page_buf, uint8_t *spare_buf, } } - for (int i = 0; i < ((mem->page_size / 0x20) / (mem->bit_width / 8)); i++) { + for (int i = 0; i < ((mem->page_size >> 5) >> (mem->bit_width >> 4)); i++) { wdog_reset(); if (mem->bit_width == 16) { ((uint16_t *)(spare_buf))[i] = NAND_Ctrl_Data_Read(); diff --git a/flash/nand/nand.c b/flash/nand/nand.c index adc71db..be93133 100644 --- a/flash/nand/nand.c +++ b/flash/nand/nand.c @@ -18,7 +18,7 @@ DCC_RETURN NAND_Read(DCCMemory *mem, uint32_t offset, uint32_t size, uint8_t *de if (ret_code != DCC_OK) return ret_code; offset += mem->page_size; page_offset += mem->page_size; - spare_offset += mem->page_size / 0x20; + spare_offset += mem->page_size >> 5; size -= mem->page_size; } while (size); diff --git a/flash/onenand/onenand.c b/flash/onenand/onenand.c index 96e3ecc..5c68eb2 100644 --- a/flash/onenand/onenand.c +++ b/flash/onenand/onenand.c @@ -57,7 +57,7 @@ uint32_t OneNAND_Read_Upper(DCCMemory *mem, uint8_t *page_buf, uint8_t *spare_bu OneNAND_Ctrl_Reg_Write(mem, O1N_REG_COMMAND, O1N_CMD_READ); OneNAND_Ctrl_Wait_Ready(mem, 0x8080); - OneNAND_Ctrl_Get_Data(mem, page_buf, spare_buf, mem->page_size, mem->page_size / 0x20); + OneNAND_Ctrl_Get_Data(mem, page_buf, spare_buf, mem->page_size, mem->page_size >> 5); return DCC_OK; } @@ -73,7 +73,7 @@ DCC_RETURN OneNAND_Read(DCCMemory *mem, uint32_t offset, uint32_t size, uint8_t if (ret_code != DCC_OK) return ret_code; offset += mem->page_size; page_offset += mem->page_size; - spare_offset += mem->page_size / 0x20; + spare_offset += mem->page_size >> 5; size -= mem->page_size; } while (size); diff --git a/flash/superand/controller/default.c b/flash/superand/controller/default.c index f7c6717..e0b1922 100644 --- a/flash/superand/controller/default.c +++ b/flash/superand/controller/default.c @@ -69,7 +69,7 @@ DCC_RETURN SuperAND_Ctrl_Read(DCCMemory *mem, uint8_t *page_buf, uint32_t page) SuperAND_Ctrl_Wait_Ready(); if (!SuperAND_Ctrl_Check_Status()) return DCC_READ_ERROR; - for (int i = 0; i < (mem->page_size / (mem->bit_width / 8)); i++) { + for (int i = 0; i < (mem->page_size >> (mem->bit_width >> 4)); i++) { wdog_reset(); if (mem->bit_width == 16) { ((uint16_t *)(page_buf))[i] = SuperAND_Ctrl_Data_Read(); diff --git a/main.c b/main.c index 99a6141..708c2c4 100644 --- a/main.c +++ b/main.c @@ -10,7 +10,7 @@ static uint8_t compBuf[DCC_BUFFER_SIZE + 0x1000]; static uint8_t rawBuf[DCC_BUFFER_SIZE + 0x1000]; #ifdef DCC_TESTING extern uint32_t DCC_COMPRESS_MEMCPY(uint32_t algo, uint32_t src_offset, uint32_t size, uint8_t *dest); -void *absolute_to_relative(void* ptr) { return ptr }; +void *absolute_to_relative(void* ptr) { return ptr; }; #else extern void *absolute_to_relative(void *ptr); #endif diff --git a/make_test.bat b/make_test.bat index 34afffe..af2022c 100644 --- a/make_test.bat +++ b/make_test.bat @@ -1,4 +1,4 @@ @echo off -clang -I . -DDCC_TESTING -DHAVE_MINILZO=1 -DHAVE_LZ4=1 -D_CRT_SECURE_NO_WARNINGS=1 test/test_rle_compress.c dcc/dn_dcc_proto.c dcc/bitutils.c minilzo/minilzo.c lz4/lz4_fs.c plat/default.c -o dcc_test_rle.exe -clang -I . -DDCC_TESTING -DHAVE_MINILZO=1 -DHAVE_LZ4=1 -D_CRT_SECURE_NO_WARNINGS=1 test/test_dcc_writing_reading.c dcc/dn_dcc_proto.c dcc/bitutils.c minilzo/minilzo.c lz4/lz4_fs.c plat/default.c -o dcc_test_wr.exe +clang -I . -DDCC_TESTING -DHAVE_MINILZO=1 -DHAVE_LZ4=1 -D_CRT_SECURE_NO_WARNINGS=1 test/test_rle_compress.c dcc/dn_dcc_proto.c minilzo/minilzo.c lz4/lz4_fs.c plat/default.c -o dcc_test_rle.exe +clang -I . -DDCC_TESTING -DHAVE_MINILZO=1 -DHAVE_LZ4=1 -D_CRT_SECURE_NO_WARNINGS=1 test/test_dcc_writing_reading.c dcc/dn_dcc_proto.c minilzo/minilzo.c lz4/lz4_fs.c plat/default.c -o dcc_test_wr.exe clang -I . -DDCC_TESTING -DHAVE_MINILZO=1 -DHAVE_LZ4=1 -D_CRT_SECURE_NO_WARNINGS=1 test/test_dcc_emulate.c test/test_dcc_platform.c main.c dcc/dn_dcc_proto.c dcc/bitutils.c minilzo/minilzo.c lz4/lz4_fs.c plat/default.c flash/cfi/cfi.c flash/mmap/mmap.c -o dcc_test_emu.exe \ No newline at end of file